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參數(shù)資料
| 型號(hào)： | GS9090 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI |
| 中文描述： | GS9090 GenLINX - R的第三270Mb / s的SDI和DVB解串器，意大利航天局 |
| 文件頁(yè)數(shù)： | 14/70頁(yè) |
| 文件大?。?/td> | 696K |
| 代理商： | GS9090 |
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GS9090 Data Sheet
28201 - 1
July 2005
14 of 70
Serial Digital Input
Serial Input Data Rate
DR
SDI
–
–
270
–
Mb/s
–
Serial Input Jitter Tolerance
IJT
–
–
0.4
–
UI
2
Serial Digital Input Signal Swing
Δ
V
DDI
Differential with
internal 100
Ω
input
termination
400
800
1700
mV
p-p
3
Parallel Output
Parallel Output Clock Frequency
f
PCLK
–
–
27
–
MHz
–
Parallel Output Clock Duty Cycle
DC
PCLK
–
40
–
60
%
–
Variation of Parallel Output Clock
(from 27MHz)
–
Device Unlocked
T
A
= -20°C to +85°C
IO_VDD = 1.8V
-7.5
–
+7.5
%
4
Output Data Hold Time
t
OH
With 15pF load
3.0
–
–
ns
5
Output Delay Time
t
OD
With 15pF load
–
–
10.0
ns
5
GSPI
GSPI Input Clock Frequency
f
GSPI
–
–
–
54.0
MHz
–
GSPI Clock Duty Cycle
DC
GSPI
–
40
–
60
%
–
GSPI Setup Time
t
GS
–
1.5
–
–
ns
–
GSPI Hold Time
t
GH
–
–
–
1.5
ns
–
NOTES:
1. No signal to signal present, or a switch from another data rate to 270Mb/s.
2. Power supply noise 50mV
pp
at 15kHz, 100kHz, 1MHz sinusoidal modulation.
3. See
Figure 2-1
.
4. When the serial input to the GS9090 is removed, the PCLK output signal will continue to operate at 27MHz and the internal VCO will
remain at this frequency within +/- 7.5% over the range -20
o
C to +85
o
C.
5. Timing includes the following outputs: DOUT[9:0], STAT[3:0]. When the FIFO is enabled, the outputs are measured with respect to
RD_CLK.
Table 2-3: AC Electrical Characteristics (Continued)
V
DD
= 1.8V, T
A
= 0°C to 70°C, unless otherwise specified.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Notes
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| GS9090A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS9090A GenLINX-R III 270Mb/s Deserializer for SDI |
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| GS9090B | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer for SDI |
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