參數(shù)資料
型號: GS9035CCPJ
廠商: Gennum Corporation
英文描述: GENLINX II -TM GS9035C Serial Digital Reclocker
中文描述: GENLINX二,商標(biāo)GS9035C串行數(shù)字時鐘恢復(fù)器
文件頁數(shù): 11/14頁
文件大?。?/td> 490K
代理商: GS9035CCPJ
GENNUM CORPORATION
20582 - 3
11 of 14
G
Fig. 15 Charge Pump Current vs. R
VCO
9.4 Spice Simulations
More detailed analysis of the GS9035C PLL can be done
using SPICE. A SPICE model of the PLL is shown below:
Fig. 16 SPICE Model of PLL
The model consists of a voltage controlled current source
(G1), the loop filter components (R
LF
, C
LF1
, and C
LF2
), a
voltage controlled voltage source (E1), and a voltage
source (V1). R2 is necessary to create a DC path to ground
for Node 1.
V1 is used to generate the input phase waveform. G1
compares the input and output phase waveforms and
generates the charge pump current,
Ι
CP
. The loop filter
components integrate the charge pump current to establish
the loop filter voltage. E1 creates the output phase
waveform (PHIO) by multiplying the loop filter voltage by
the value of the Laplace transform (2pK
/Ns).
The netlist for the model is given below. The .PARAM
statements are used to set values for
Ι
CP
, K
, N, and D.
Ι
CP
is determined by the R
VCO
resistor and is obtained from
Figure 15.
SPICE NETLIST * GS9035C PLL Model
.PARAM ICP = 165E-6 KF= 90E+6
.PARAM N = 1 D = 0.5
.PARAM PI = 3.14
.IC V(Phio) = 0
.ac dec 30 1k 10meg
RLF 1 LF 1000
CLF1 1 0 15n
CLF2 0 LF 15p
E_LAPLACE1 Phio 0 LAPLACE {V(LF)} {(2*PI*KF)/(N*s)}
G1 0 LF VALUE{D * ICP/(2*pi)*V(Phii, Phio)}
V1 2 0 DC 0V AC 1V
R2 0 1 1g
.END
10. I/O DESCRIPTION
10.1 High Speed Inputs (DDI/DDI)
DDI/DDI are high impedance inputs which accept
differential or single-ended input drive. Two conditions must
be observed when interfacing to these inputs:
1. Input signal amplitudes are between 200 and 2000mV
2. The common mode input voltage range is as specified
in the DC Characteristics table.
Commonly used interface examples are shown in
Figures 17 and 18.
Figure 18 illustrates the simplest interface to the GS9035C.
In this example, the driving device generates the PECL
level signals (800mV amplitudes) having a common mode
input range between 0.4 and 4.6V. This scheme is
recommended when the trace lengths are less than 1in. The
value of the resistors and the DC connection (V
CC
or
Ground), depends on the output driver circuitry of the
previous device.
Fig. 17 Simple Interface to the GS9035C
0
50
100
150
200
250
300
350
400
0
200
400
600
800
1000
1200
1400 1600
1800
C
R
VCO
(
)
PHII
PHIO
R2
E1
R
LF
C
LF1
C
LF2
G1
V1
2
π
K
N
s
IN+
IN-
1
LF
NOTE: PHII, PHIO, LF and 1 are node names in the SPICE netlist.
DDI
DDI
V
CC
or GND
V
CC
or GND
GS9035C
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