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GENNUM CORPORATION
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2.2.8 Detection of Extended Audio Packets
The GS9023A can demultiplex 20 or 24 bit audio samples.
For 24 bit audio samples, the 20 MSBs of a 24 bit audio
sample are contained in the audio data packets and the 4
LSBs are contained in an extended audio data packet as
defined in SMPTE 272. The audio group (Extended packet
data ID) for each device is configured in “AD4ID[3:0]” of
Host Interface Register #3h. When the corresponding
extended audio packets are detected on the active video
stream, the GS9023A sets the AUXEN pin and the “A4ON”
bit of Host Interface Register #1h to HIGH. If no
corresponding extended audio packets are found on the
active video line, the AUXEN pin and “A4ON” bit are set to
LOW. On power up, audio group 1 extended audio packets
are selected by default.
2.2.9 Detection of Audio Control Packets
The audio group (Audio control packet data ID) for each
device is configured in “ACID[3:0]” of Host Interface
Register #4h. When the configured ID is detected on the
designated video lines (see Table 6), the “ACON” bit of
Host Interface Register #1h is set. The corresponding Audio
control parameters are stored in Host Interface Registers
#Ah, #Bh, #Ch and #Dh. If an audio control packet is not
detected or found in non-designated video lines, “ACON” is
set to LOW. However, the information in the audio control
packets found in non-designated lines is considered valid
and is stored in Host Interface Registers #Ah, #Bh, #Ch and
#Dh. On power up, audio group 1 audio control packets are
selected by default.
2.2.10 Detection and Output of Arbitrary Data Packets
The GS9023A is capable of demultiplexing arbitrary data
packets according to SMPTE 291M. There are no limitations
on the number of packets that can be demultiplexed and
the packets can be located outside of the vertical blanking
interval (VBI).
The arbitrary data packet data ID is configured in
PKTID[7:0] of Host Interface Register #5h. When the
configured ID is detected in the active video or HANC area,
data on the PKT[8:0] pins is clocked out on the rising edge
of PCLK. The GS9023A sets the PKTEN output pin HIGH,
when the data at the PKT[8:0] outputs is valid. PKTEN is set
LOW when the last user data word (UDW) is output from
PKT[8:0]. Figure 16 shows the output timing.
2.2.11 Error Detection
The GS9023A provides error status information in Host
Interface Registers #7h, #8h and #9h as described in Table
15. Register #7 contains error information on audio
sampling and CRC conditions. Register #8 contains error
information on audio packet data block number and data
count. Register #9 contains error information on Control
packets. Errors are cleared when the respective Host
Interface Register is read.
Figure 16 Arbitrary Data Output Timing Diagram
PCLK (I)
PKTEN (O)
PKT[8:0] (O)
Valid data
NOTE: 1 - The ancillary data flag, ADF, is one word in composite systems (ANSI/SMPTE 259M)
and three words in component systems (ANSI/SMPTE 125M).
A
1
S
D
X
X
X
X
X
X
X
C
A
1
A
1
D
1 clk