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參數(shù)資料
| 型號： | FWLF1621P2T55 |
| 元件分類： | 光收發(fā) |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 1450-1620nm, 2670Mbps(Tx), 2670Mbps(Rx), LC CONNECTOR |
| 封裝： | ROHS COMPLIANT |
| 文件頁數(shù)： | 5/12頁 |
| 文件大小： | 506K |
| 代理商： | FWLF1621P2T55 |
FWLF1621P2Txx SFP Product Specification – November 2007
F i n i s a r
Finisar Corporation November 2007 Rev.A Preliminary and Confidential
Page 2
I.
Pin Descriptions
Pin
Symbol
Name/Description
Ref.
1
VEET
Transmitter Ground (Common with Receiver Ground)
1
2
TFAULT
Transmitter Fault. Not supported.
3
TDIS
Transmitter Disable. Laser output disabled on high or open.
2
4
MOD_DEF(2)
Module Definition 2. Data line for Serial ID.
3
5
MOD_DEF(1)
Module Definition 1. Clock line for Serial ID.
3
6
MOD_DEF(0)
Module Definition 0. Grounded within the module.
3
7
Rate Select
No connection required
4
8
LOS
Loss of Signal indication. Logic 0 indicates normal operation.
5
9
VEER
Receiver Ground (Common with Transmitter Ground)
1
10
VEER
Receiver Ground (Common with Transmitter Ground)
1
11
VEER
Receiver Ground (Common with Transmitter Ground)
1
12
RD-
Receiver Inverted DATA out. AC Coupled
13
RD+
Receiver Non-inverted DATA out. AC Coupled
14
VEER
Receiver Ground (Common with Transmitter Ground)
1
15
VCCR
Receiver Power Supply
16
VCCT
Transmitter Power Supply
17
VEET
Transmitter Ground (Common with Receiver Ground)
1
18
TD+
Transmitter Non-Inverted DATA in. 100 ohm termination between TD+
and TD-, AC Coupled thereafter.
19
TD-
Transmitter Inverted DATA in. See TD+
20
VEET
Transmitter Ground (Common with Receiver Ground)
1
Notes:
1.
Circuit ground is internally isolated from chassis ground.
2.
Laser output disabled on TDIS >2.0V or open, enabled on TDIS <0.8V.
3.
Should be pulled up with 4.7k – 10kohms on host board to a voltage between 2.0V and 5.5V.
MOD_DEF(0) pulls line low to indicate module is plugged in.
4.
Finisar 2x receiver achieves simultaneous 1x and 2x operation without active control.
5.
LOS is open collector output. Should be pulled up with 4.7k – 10kohms on host board to a voltage
between 2.0V and 5.5V. Logic 0 indicates normal operation; logic 1 indicates loss of signal.
VeeT
VeeR
TD-
TD+
RD+
RD-
VccT
VccR
VeeT
VeeR
TXFault
MOD-DEF(2)
MOD-DEF(1)
MOD-DEF(0)
Rate Select
LOS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Towards
ASIC
Towards
Bezel
TX Disable
VeeR
Diagram of Host Board Connector Block Pin Numbers and Names
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