參數(shù)資料
型號: EVAL-AD7470_07
廠商: Analog Devices, Inc.
英文描述: Evaluation Board for 10-/12-Bit High Speed, Low Power ADCs
中文描述: 評估板10-/12-Bit高速,低功耗ADC
文件頁數(shù): 5/20頁
文件大?。?/td> 622K
代理商: EVAL-AD7470_07
EVAL-AD7470/AD7472
EVAL-CONTROL BRD2 INTERFACING
Interface to the EVAL-CONTROL BRD2 via a 96-way
connector, J1. The pinout for the J1 connector is shown in
Figure 2 and its pin designations are given in Table 4.
Rev. C | Page 5 of 20
1
32
1
32
A
B
C
0
Figure 2. Pin Configuration for the 96-Way Connector, J1
Table 3. 96-Way Connector Pin Description
Signal
Description
D0 to
D11
is the MSB.
SCLK0
Serial Clock Zero. This continuous clock can be
connected to the CLKIN pin of the AD7470/AD7472
via LK3.
+5VD
Digital +5 V supply. This can be used to provide a
separate +5 V supply for the digital logic if required
via LK2.
RD
Read. This is an active low logic input connected to the
RD pin of the AD7470/AD7472 via LK5.
CS
Chip Select. This is an active low logic input connected
to the CS pin of the AD7470/AD7472 via LK6.
FL0
Flag Zero. This logic input is connected to the CONVST
input of the AD7470/AD7472 via LK4.
IRQ2
Interrupt Request 2. This is a logic output and is
connected to the BUSY logic output on the
AD7470/AD7472.
DGND
Digital Ground. These lines are connected to the
digital ground plane on the evaluation board. It
allows the user to provide the digital supply via
the connector along with the other digital signals.
AGND
Analog Ground. These lines are connected to the
analog ground plane on the evaluation board.
AVSS
Negative Supply Voltage. This provides a negative
supply to the on-board op amps via LK9.
AVDD
Positive Supply Voltage. This provides a positive
supply to the op amps, the reference, the
AD7470/AD7472, and the digital logic.
Data Bit 0 to Data Bit 11. Three-state TTL outputs. D11
Table 4. 96-Way Connector Pin Functions
1
Pin
Row A
1
2
3
4
DGND
5
6
7
SCLK0
8
+5VD
9
RD
10
11
12
DGND
13
14
15
16
DGND
17
FL0
18
19
20
DGND
21
AGND
22
AGND
23
AGND
24
AGND
25
AGND
26
AGND
27
28
29
AGND
30
31
AVSS
32
AVDD
Row B
D0
D1
DGND
D2
D3
D4
+5VD
D5
D6
D7
DGND
D8
D9
D10
DGND
D11
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AVSS
AVDD
Row C
DGND
SCLK0
+5VD
CS
DGND
DGND
IRQ2
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AVSS
AVDD
1
The unused pins of the 96-way connector are not shown.
While the
AD7470
/
AD7472
data sheet specifies a maximum
clock frequency of 30 MHz and 26 MHz for the parts, the
DSP and the on-board crystal oscillator output a 20 MHz and
25 MHz clock, respectively. Therefore, the maximum sampling
frequency is less than specified on the data sheet. An external
clock frequency (up to the maximum specified on the data
sheet) can be applied via the external socket, SK1.
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