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參數(shù)資料
| 型號(hào)： | EVAL-AD7470_07 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Evaluation Board for 10-/12-Bit High Speed, Low Power ADCs |
| 中文描述： | 評(píng)估板10-/12-Bit高速，低功耗ADC |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 622K |
| 代理商： | EVAL-AD7470_07 |
EVAL-AD7470/AD7472
Link No. Function
LK4
LK5
LK6
LK7
LK8
LK9
LK10
LK11
Rev. C | Page 4 of 20
This link option selects the source of the CONVST input.
In Position A, the CONVST input is provided by the EVAL-CONTROL BOARD2.
In Position B, the CONVST input is provided via the external socket, SK2.
This link option selects the source of the RD input.
In Position A, the RD input is provided by the EVAL-CONTROL BRD2.
In Position B, the RD input is tied to GND.
This link option selects the source of the CS input.
In Position A, the CS input is provided by the EVAL-CONTROL BRD2.
In Position B, the CS input is tied to GND.
This link option sets the voltage applied to the V
DRIVE
pin on the AD7470/AD7472.
In Position A, V
DRIVE
is connected directly to the DV
DD
pin.
In Position B, an external voltage must be applied to the V
DRIVE
pin via J3.
This link selects the source of the VDD supply.
In Position A, VDD must be supplied from an external source via J2.
In Position B, VDD is supplied from the EVAL-CONTROL BRD2.
This link selects the source of the V
SS
supply.
In Position A, V
SS
must be supplied from an external source via J2.
In Position B, V
SS
is supplied from the EVAL-CONTROL BRD2.
This link must be in Position A, if a bipolar AIN signal is being applied to the bipolar VIN socket, SK3.
This link must be in Position B, if a unipolar AIN signal is being applied to the unipolar VIN socket, SK5.
This link is used to provide a clock signal path to the burst mode circuit generator either from the on-board clock oscillator or
from an external clock source via SK1.
In Position A, the master clock signal is provided from the on-board crystal oscillator.
In Position B, the master clock signal must be provided from an external source via SK1.
SET-UP CONDITIONS
Before applying power and signals to the evaluation board, take care to ensure that all link positions are as per the required operating
mode. Table 2 shows the default positions of the links. All links are set for use with the EVAL-CONTROL BRD2.
Table 2. Initial Link and Switch Positions
Link No.
Position
LK1
Inserted
LK2
A
LK3
A
LK4
A
LK5
A
LK6
A
LK7
A
LK8
B
LK9
B
LK10
A
LK11
A
Function
Provides dc bias voltage to the analog bias-up circuit.
The digital logic circuitry is powered from the same voltage as the AD7470/AD7472.
The CLKIN signal is provided by the EVAL-CONTROL BRD2 via J1.
The CONVST signal is provided by the EVAL-CONTROL BRD2 via J1.
The RD signal is provided by the EVAL-CONTROL BRD2 via J1.
The CS signal is provided by the EVAL-CONTROL BRD2 via J1.
The AD7470/AD7472 V
DRIVE
pin is connected to the AD7470/AD7472 DV
DD
pin.
V
DD
is supplied by the EVAL-CONTROL BRD2 via J1.
V
SS
is supplied by the EVAL-CONTROL BRD2 via J1.
The AD7470/AD7472 V
IN
pin is connected to the output of the bias-up circuit.
Master clock for burst clock generator is provided from the on-board clock oscillator.
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相關(guān)代理商/技術(shù)參數(shù) |
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| EVAL-AD7470CB | 制造商:Analog Devices 功能描述:EVAL BD FOR AD7470 ADC - Bulk |
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| EVAL-AD7472 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Evaluation Board for 12-bit high speed, low power, successive-approximation ADC |
| EVAL-AD7472CB | 制造商:Analog Devices 功能描述:1.75 MSPS, 4 MW 10-BIT/12-BIT PARALLEL ADCS 制造商:Analog Devices 功能描述:EVAL BD FOR AD7472 ADC - Bulk |
| EVAL-AD7472CB2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1.75 MSPS, 4 mW 10-Bit/12-Bit Parallel ADCs |
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