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參數(shù)資料

Altera Corporation

Errata Sheet - Appendix A

A.2.2

Execution status unknown prior to an interrupt or prefetch

abort—Category 2

Description

The trace port protocol allows for each instruction traced to be reported

with a corresponding branch address to indicate the address of the next

instruction. If this branch address is not output then the trace tools must

calculate the address of the next instruction. If a branch address is output

then the PIPESTAT pins of the trace port will indicate

Branch Executed

(BE)

Branch with Data

(BD).

When an interrupt or prefetch abort occurs, the instruction which follows

the last instruction to be executed should be traced (even though it did not

execute) with a branch address to the relevant exception vector. In the case

of interrupts this is often referred to as the interrupted instruction. The

trace tools must recognize that the branch was to an interrupt or prefetch

abort exception vector, and correctly treat that instruction as having not

executed. In this way, the trace can reliably indicate if the last instruction

executed failed its condition codes.

Sometimes the ETM does not trace this extra instruction but instead traces

the last instruction executed as having branched to the exception vector.

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
EPXA4F1020C1	制造商:Rochester Electronics LLC 功能描述: 制造商:Altera Corporation 功能描述:IC EXCALIBUR ARM 1020FBGA
EPXA4F1020C1ES	制造商:Altera Corporation 功能描述:IC EXCALIBUR ARM 1020FBGA
EPXA4F1020C2	制造商:Rochester Electronics LLC 功能描述: 制造商:Altera Corporation 功能描述:IC EXCALIBUR ARM 1020FBGA
EPXA4F1020C2ES	制造商:Altera Corporation 功能描述:IC EXCALIBUR ARM 1020FBGA
EPXA4F1020C3	制造商:Altera Corporation 功能描述:IC EXCALIBUR ARM 1020FBGA

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