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參數(shù)資料
| 型號： | EPVP6810 |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | VFD Controller |
| 中文描述： | 變頻控制器 |
| 文件頁數(shù)： | 21/50頁 |
| 文件大?。?/td> | 343K |
| 代理商： | EPVP6810 |
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ePVP6810
VFD Controller
This specification is subject to change without further notice.
11.28.2004 (V1.23)
15 of 50
7.2.10 R9 (PORT9 I/O Data, Data RAM Data Buffer) ,Counter2_HB Data
a) PAGE 0 (PORT9 I/O Data Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
P97
P96
P95
P94
P93
P92
P91
P90
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (P90 ~ P97)
:
8-bit PORT9(0~7) I/O data register
You can use IOC register to define input or output each bit, and to
define the pull high condition.
Bit 0:
1. P90
2. LED0
3. IR Input
:
can be defined as Input/Output
:
can be defined as Output
:
can be defined as Input and IR is enabled
(when IOCF Bit7 is set to 1)
Bit 1 ~ Bit4:
1. P91~P94
2. LED1~LED4
:
can be defined as Output
3. INT1~INT4
:
can be defined as Input
:
can be defined as Input/Output
Bit 5 ~ Bit7:
1. P95~P97
2. LED5~LED7
:
can be defined as Output
:
can be defined as Input/Output
b) PAGE 1 (Data RAM Data Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RAM_D7
RAM_D6
RAM_D5
RAM_D4
RAM_D3
RAM_D2
RAM_D1
RAM_D0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (RAM_D0 ~ RAM_D7)
:
Data RAM’s data
c) PAGE 2 (Counter2 High Byte Data Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CN215
CN214
CN213
CN212
CN211
CN210
CN29
CN28
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit 0 ~ Bit 7 (CN28 ~ CN215)
:
Counter2_HB's buffer that you can read and write.
Counter2 is a 16-bit up-counter with 8-bit prescaler that
allows you to use R9 PAGE2 to preset and read the counter
(write
preset). After an interruption, it will reload the preset
value.
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