參數(shù)資料
型號： EPF6010ATC100-3N
廠商： Altera
文件頁數(shù)： 30/52頁
文件大?。?/td> 0K
描述： IC FLEX 6000 FPGA 10K 100-TQFP
產品培訓模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 270
系列： FLEX 6000
LAB/CLB數(shù)： 88
邏輯元件/單元數(shù)： 880
輸入/輸出數(shù)： 71
門數(shù)： 10000
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 100-TQFP
供應商設備封裝： 100-TQFP（14x14）
產品目錄頁面： 602 (CN2011-ZH PDF)
其它名稱： 544-1950
EPF6010ATC100-3N-ND
36
Altera Corporation
FLEX 6000 Programmable Logic Device Family Data Sheet
Timing Model
The continuous, high-performance FastTrack Interconnect routing
resources ensure predictable performance and accurate simulation and
timing analysis. This predictable performance contrasts with that of
FPGAs, which use a segmented connection scheme and therefore have
unpredictable performance.
Device performance can be estimated by following the signal path from a
source, through the interconnect, to the destination. For example, the
registered performance between two LEs on the same row can be
calculated by adding the following parameters:
■
LE register clock-to-output delay (tCO + tREG_TO_OUT)
■
Routing delay (tROW + tLOCAL)
■
LE LUT delay (tDATA_TO_REG)
■
LE register setup time (tSU)
The routing delay depends on the placement of the source and destination
LEs. A more complex registered path may involve multiple combinatorial
LEs between the source and destination LEs.
Timing simulation and delay prediction are available with the Simulator
and Timing Analyzer, or with industry-standard EDA tools. The
Simulator offers both pre-synthesis functional simulation to evaluate logic
design accuracy and post-synthesis timing simulation with 0.1-ns
resolution. The Timing Analyzer provides point-to-point timing delay
information, setup and hold time analysis, and device-wide performance
analysis.
Figure 19 shows the overall timing model, which maps the possible
routing paths to and from the various elements of the FLEX 6000 device.
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相關代理商/技術參數(shù)
參數(shù)描述
EPF6010ATC144-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6010ATC144-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6010ATC144-2N 制造商:Altera Corporation 功能描述:FPGA FLEX 6000 Family 10K Gates 880 Cells 166.67MHz CMOS Technology 3.3V 144-Pin TQFP
EPF6010ATC144-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF6010ATC144-3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 6000 88 LABs 102 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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