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參數(shù)資料
| 型號： | EN29F002AT-90TCP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 2 Megabit (256K x 8-bit) Flash Memory |
| 中文描述： | 2兆位（256K × 8位）閃存 |
| 文件頁數(shù)： | 8/35頁 |
| 文件大?。?/td> | 431K |
| 代理商： | EN29F002AT-90TCP |
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This Data Sheet may be revised by subsequent versions 2003 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. A, Issue Date: 2003/03/26
EN29F002A / EN29F002AN
Table 5. EN29F002A Command Definitions
Command
Sequence
Read/Reset
Write
Cycles
Req’d
1
st
Write Cycle
2
nd
Write Cycle
3
rd
Write Cycle
4
th
Write Cycle
5
th
Write Cycle
6
th
Write Cycle
Read/Reset
Read/Reset
AutoSelect
Manufacturer ID
AutoSelect Device ID
(Top Boot)
AutoSelect Device ID
(Bottom Boot)
AutoSelect Sector
Protect Verify
Byte Program
Chip Erase
Sector Erase
Sector Erase Suspend
Sector Erase Resume
Addr
XXXh F0h
555h AAh
555h AAh
Data
Addr
RA
AAAh
AAAh
Data
RD
55h
55h
Addr
Data
Addr
Data
Addr
Data
Addr
Data
1
4
4
555h
555h
F0h
90h
RA
000h/
100h
001h/
101h
001h/
101h
SA &
02h
PA
555h
555h
RD
7Fh/
1Ch
7Fh/
92h
7Fh/
97h
00h/
01h
PD
AAh
AAh
4
555h AAh
AAAh
55h
555h
90h
4
555h AAh
AAAh
55h
555h
90h
4
555h AAh
AAAh
55h
555h
90h
4
6
6
1
1
555h AAh
555h AAh
555h AAh
xxxh
xxxh
AAAh
AAAh
AAAh
55h
55h
55h
555h
555h
555h
A0h
80h
80h
AAAh 55h
AAAh 55h
555h
SA
10h
30h
B0h
30h
Notes:
RA = Read Address: address of the memory location to be read. This one is a read cycle.
RD = Read Data: data read from location RA during Read operation. This one is a read cycle.
PA = Program Address: address of the memory location to be programmed
PD = Program Data: data to be programmed at location PA
SA = Sector Address: address of the sector to be erased. Address bits A17-A13 uniquely select any sector.
The data is 00h for an unprotected sector and 01h for a protected sector.
Byte Programming Command
Programming the EN29F002A is performed on a byte-by-byte basis using a four bus-cycle operation
(two unlock write cycles followed by the Program Setup command and Program Data Write cycle).
When the program command is executed, no additional CPU controls or timings are necessary. The
program operation is terminated automatically by an internal timer. Address is latched on the falling
edge of
CE
or
W E
, whichever is last; data is latched on the rising edge of
CE
or
W E
, whichever
is first. The program operation is completed when EN29F002A returns the equivalent data to the
programmed location.
Programming status may be checked by sampling data on DQ7 (
DATA
polling) or on DQ6 (toggle
bit). Changing data from 0 to 1 requires an erase operation. When programming time limit is
exceeded, DQ5 will produce a logical “1” and a Reset command can return the device to Read
mode.
EN29F002A ignores commands written during Byte Programming. If a hardware
RESET
occurs
during Byte Programming, data at the programmed location may get corrupted. Programming is
allowed in any sequence and across any sector boundary.
Chip Erase Command
An auto Chip Erase algorithm is employed when the Chip Erase command sequence is performed.
Although the Chip Erase command requires six bus cycles: two unlock write cycles, a setup
command, two additional unlock write cycles and the chip erase command, the user does not need
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EN29F002AT-90TI | 2 Megabit (256K x 8-bit) Flash Memory |
| EN29F002AT-90TIP | 2 Megabit (256K x 8-bit) Flash Memory |
| EN29F002AT-70TC | 2 Megabit (256K x 8-bit) Flash Memory |
| EN29F002T-55J | Octal D Flip-Flop with 3-STATE Outputs; Package: TSSOP; No of Pins: 20; Container: Rail |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EN29F002AT-90TI | 制造商:EON 制造商全稱:Eon Silicon Solution Inc. 功能描述:2 Megabit (256K x 8-bit) Flash Memory |
| EN29F002AT-90TIP | 制造商:EON 制造商全稱:Eon Silicon Solution Inc. 功能描述:2 Megabit (256K x 8-bit) Flash Memory |
| EN29F002B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (262，144 x 8) FLASH |
| EN29F002B-45J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (256K x 8-bit) Flash Memory |
| EN29F002B-45JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (256K x 8-bit) Flash Memory |
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