參數(shù)資料
型號: EN29F002AT-90TCP
廠商: Electronic Theatre Controls, Inc.
英文描述: 2 Megabit (256K x 8-bit) Flash Memory
中文描述: 2兆位(256K × 8位)閃存
文件頁數(shù): 23/35頁
文件大?。?/td> 431K
代理商: EN29F002AT-90TCP
This Data Sheet may be revised by subsequent versions 2003 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. A, Issue Date: 2003/03/26
EN29F002A / EN29F002AN
Table 9. AC CHARACTERISTICS
Write (Erase/Program) Operations
Parameter
Symbols
JEDEC
Standard
Description
t
AVAV
t
WC
Write Cycle Time
Speed Options
Min
-45
-55
-70
-90
Unit
45
55
70
90
ns
t
AVWL
t
AS
Address Setup Time
Min
0
0
0
0
ns
t
WLAX
t
AH
Address Hold Time
Min
35
45
45
45
ns
t
DVWH
t
DS
Data Setup Time
Min
20
25
30
45
ns
t
WHDX
t
DH
Data Hold Time
Min
0
0
0
0
ns
t
OES
Output Enable Setup Time
Min
0
0
0
0
ns
t
OEH
Output Enable Read
MIn
0
0
0
0
ns
Hold Time
Toggle and
DATA
Polling
Min
10
10
10
10
ns
t
GHWL
t
GHWL
Read Recovery Time before
Write (
OE
High to
W E
Low)
CE
SetupTime
Min
0
0
0
0
ns
t
ELWL
t
WHEH
t
WLWH
t
WHDL
t
WHWH1
t
WHWH1
t
WHWH2
t
WHWH2
t
WHWH3
t
WHWH3
t
CS
t
CH
t
WP
t
WPH
Min
0
0
0
0
ns
CE
Hold Time
Min
0
0
0
0
ns
Write Pulse Width
Min
25
30
35
45
ns
Write Pulse Width High
Min
20
20
20
20
ns
Programming Operation
Typ
7
7
7
7
μs
Max
200
200
200
200
μs
Sector Erase Operation
Typ
0.3
0.3
0.3
0.3
s
Max
5
5
5
5
s
Chip Erase Operation
Typ
3
3
3
3
s
t
VCS
t
VIDR
Max
35
35
35
35
s
Vcc Setup Time
Min
50
50
50
50
μs
Rise Time to V
ID
Min
500
500
500
500
ns
t
RP
RESET
Pulse Width
(n/a for EN29F002AN)
Min
500
500
500
500
ns
t
RSP
RESET
Setup Time
(n/a for EN29F002AN)
Min
4
4
4
4
μs
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EN29F002B-45J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2 Megabit (256K x 8-bit) Flash Memory
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