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參數(shù)資料
| 型號： | DS83C530-QCL |
| 廠商： | DALLAS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | EPROM/ROM Microcontrollers with Real-Time Clock |
| 中文描述： | 8-BIT, UVPROM, 33 MHz, MICROCONTROLLER, CQCC52 |
| 封裝： | WINDOWED, CERQUAD-52 |
| 文件頁數(shù)： | 4/46頁 |
| 文件大?。?/td> | 749K |
| 代理商： | DS83C530-QCL |
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DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock
4 of 46
PIN DESCRIPTION (continued)
PIN
PLCC
TQFP
NAME
FUNCTION
38
31
PSEN
Program Store-Enable Output.
This active-low signal is a chip enable for optional
external ROM memory.
PSEN
provides an active-low pulse and is driven high when
external ROM is not being accessed.
Address Latch-Enable Output.
This pin latches the external address LSB from the
multiplexed address/data bus on Port 0. This signal is commonly connected to the
latch enable of an external 373 family transparent latch. ALE has a pulse width of
1.5 XTAL1 cycles and a period of four XTAL1 cycles. ALE is forced high when the
device is in a Reset condition. ALE can be disabled and forced high by writing
ALEOFF = 1 (PMR.2). ALE operates independently of ALEOFF during external
memory accesses.
39
32
ALE
50
43
P0.0 (AD0)
49
42
P0.1 (AD1)
48
41
P0.2 (AD2)
47
40
P0.3 (AD3)
46
39
P0.4 (AD4)
45
38
P0.5 (AD5)
44
37
P0.6 (AD6)
43
36
P0.7 (AD7)
Port 0 (AD0–AD7), I/O
. Port 0 is an open-drain, 8-bit, bidirectional I/O port. As an
alternate function Port 0 can function as the multiplexed address/data bus to access
off-chip memory. During the time when ALE is high, the LSB of a memory address
is presented. When ALE falls to a logic 0, the port transitions to a bidirectional data
bus. This bus is used to read external ROM and read/ write external RAM memory
or peripherals. When used as a memory bus, the port provides active high drivers.
The reset condition of Port 0 is tri-state. Pullup resistors are required when using
Port 0 as an I/O port.
3
48
P1.0
4
49
P1.1
5
50
P1.2
6
51
P1.3
7
52
P1.4
8
4
P1.5
9
2
P1.6
10
3
P1.7
Port 1, I/O
. Port 1 functions as both an 8-bit, bidirectional I/O port and an alternate
functional interface for Timer 2 I/O, new External Interrupts, and new Serial Port 1.
The reset condition of Port 1 is with all bits at a logic 1. In this state, a weak pullup
holds the port high. This condition also serves as an input mode, since any external
circuit that writes to the port will overcome the weak pullup. When software writes a
0 to any port pin, the device will activate a strong pulldown that remains on until
either a 1 is written or a reset occurs. Writing a 1 after the port has been at 0 will
cause a strong transition driver to turn on, followed by a weaker sustaining pullup.
Once the momentary strong driver turns off, the port again becomes the output high
(and input) state. The alternate modes of Port 1 are outlined as follows.
Port
Alternate
Function
P1.0
T2
External I/O for Timer/Counter 2
P1.1
T2EX
Timer/Counter 2 Capture/Reload Trigger
P1.2
RXD1
Serial Port 1 Input
P1.3
TXD1
Serial Port 1 Output
P1.4
INT2
External Interrupt 2 (Positive Edge Detect)
P1.5
INT3
External Interrupt 3 (Negative Edge Detect)
P1.6
INT4
External Interrupt 4 (Positive Edge Detect)
P1.7
INT5
External Interrupt 5 (Negative Edge Detect)
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| DS83C530-DS87C530 | EPROM/ROM Microcontrollers with Real-Time Clock |
| DS83C530-ECL | EPROM/ROM Microcontrollers with Real-Time Clock |
| DS83C530-ENL | EPROM/ROM Microcontrollers with Real-Time Clock |
| DS83C530-QNL | EPROM/ROM Microcontrollers with Real-Time Clock |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS83C530-QCL+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM/ROM Microcontrollers with Real-Time Clock |
| DS83C530-QNL | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:EPROM/ROM Microcontrollers with Real-Time Clock |
| DS83C530-QNL+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM/ROM Microcontrollers with Real-Time Clock |
| DS83CH20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral (Multifunction) Controller |
| DS84 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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