參數(shù)資料
型號: DS2482S-100+
廠商: Maxim Integrated Products
文件頁數(shù): 10/24頁
文件大小: 0K
描述: IC BRIDGE I2C TO 1-WIRE 8-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 100
控制器類型: I²C 總線控制器
接口: I²C
電源電壓: 3.3V,5V
電流 - 電源: 750µA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
產(chǎn)品目錄頁面: 1429 (CN2011-ZH PDF)
Single-Channel 1-Wire Master
Device Reset (After Power-Up)
Activities that are underlined denote an optional read access to verify the success of the command.
Set Read Pointer (To Read from Another Register)
Case A: Valid Read Pointer Code
C3h is the valid read pointer code for the Configuration Register.
Case B: Invalid Read Pointer Code
E5h is an invalid read pointer code.
Write Configuration (Before Starting 1-Wire Activity)
Case A: 1-Wire Idle (1WB = 0)
Activities that are underlined denote an optional read access to verify the success of the command.
Case B: 1-Wire Busy (1WB = 1)
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
1-Wire Reset (To Begin or End 1-Wire Communication)
Case A: 1-Wire Idle (1WB = 0), No Busy Polling to Read the Result
In the first cycle, the master sends the command. Then the master waits (Idle) for the 1-Wire reset to complete. In
the second cycle, the DS2482-100 is accessed to read the result of the 1-Wire reset from the Status Register.
Case B: 1-Wire Idle (1WB = 0), Busy Polling Until the 1-Wire Command is Completed, then Read the Result
Case C: 1-Wire Busy (1WB = 1)
The master should stop and restart as soon as the DS2482-100 does not acknowledge the command code.
S
AD,0
A
1WRS
A\
P
S
AD,0
A
1WRS
A
<byte>
A
REPEAT UNTIL THE 1WB BIT HAS CHANGED TO 0.
<byte>
AA\
Sr
P
AD,1
S
AD,0
A
1WRS
S
AD,1
A
<byte>
AA\
P
(Idle)
S
AD,0
A
WCFG
A\
P
S
AD,0
A
WCFG
A
Sr
AD,1
A
<byte>
A\
P
<byte>
S
AD,0
A
SRP
AA\
E5h
P
S
AD,0
A
SRP
AA
C3h
P
S
AD,0
A
DRST
A
Sr
AD,1
A
<byte>
A\
P
I2C Communication Examples (continued)
DS2482-100
18
Maxim Integrated
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