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參數(shù)資料
| 型號： | DS2417P/T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TIMECHIP W/INTRPT 1WIRE 6TSOC |
| 標準包裝： | 4,000 |
| 類型： | 二進制計數(shù)器 |
| 特點： | 唯一 ID |
| 時間格式： | 二進制 |
| 數(shù)據(jù)格式： | 二進制 |
| 接口： | 1 線 串行 |
| 電源電壓： | 2.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-LSOJ |
| 供應商設備封裝： | 6-TSOC |
| 包裝： | 帶卷 (TR) |
DS2417
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence con-
sists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the
slave(s). The presence pulse lets the bus master know that the DS2417 is on the bus and is ready to
operate. For more details, see the “1-Wire Signaling” section.
ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of the four ROM function commands that
the DS2417 supports. All ROM function commands are eight bits long. A list of these commands
follows (refer to flowchart in Figure 7):
Read ROM [33h]
This command allows the bus master to read the DS2417’s 8-bit family code, unique 48-bit serial num-
ber, and 8-bit CRC. This command should only be used if there is a single slave on the bus. If more than
one slave is present on the bus, a data collision will occur when all slaves try to transmit at the same time
(open drain will produce a wired-AND result). The resultant family code and 48-bit serial number read
by the master will be invalid.
Match ROM [55h]
The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address a spe-
cific DS2417 on a multidrop bus. Only the DS2417 that exactly matches the 64-bit ROM sequence will
respond to the following clock function command. All slaves that do not match the 64-bit ROM
sequence will wait for a reset pulse. This command can be used with a single or multiple devices on the
bus.
SEARCH ROM [F0h]
When a system is initially brought up, the bus master might not know the number of devices on the 1-
Wire bus or their 64-bit ROM codes. The search ROM command allows the bus master to use a process
of elimination to identify the 64-bit ROM codes of all slave devices on the bus. The search ROM process
is the repetition of a simple 3-step routine: read a bit, read the complement of the bit, then write the de-
sired value of that bit. The bus master performs this three-step routine on each bit of the ROM. After one
complete pass, the bus master knows the 64-bit ROM code of one device. Additional passes will identify
the ROM codes of the remaining devices. See
Application Note 187 for a comprehensive discussion of a
search ROM, including an actual example.
Skip ROM [CCh]
This command can save time in a single drop bus system by allowing the bus master to access the clock
functions without providing the 64-bit ROM code. If more than one slave is present on the bus and, for
example, a read command is issued following the Skip ROM command, data collision will occur on the
bus as multiple slaves transmit simultaneously (open-drain pulldowns will produce a wired-AND result).
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS2417V | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:1-Wire Time Chip With Interrupt |
| DS2417X | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS2417X/T&R | 制造商:Maxim Integrated Products 功能描述:IC TIMECHIP W/INTRPT 1WIRE CSP |
| DS2417X/T&R | 功能描述:IC TIMECHIP W/INTRPT 1WIRE CSP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應商設備封裝:8-TDFN EP 包裝:管件 |
| DS2421FP000 | 制造商:Thomas & Betts 功能描述:200A,CON,3P4W,MG,421,3P440V |
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