參數(shù)資料
型號: DS2407
廠商: DALLAS SEMICONDUCTOR
元件分類: DRAM
英文描述: Dual Addressable Switch Plus 1K-Bit Memory(雙路可尋址開關(guān)+1K存儲器)
中文描述: 1K X 1 1-WIRE SERIAL EEPROM, PBCY3
封裝: TO-92, 3 PIN
文件頁數(shù): 31/31頁
文件大小: 200K
代理商: DS2407
DS2407
041498 31/31
PIO SINK CURRENT
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2.8V
4V
5V
6V
V
PUP
100 mA
90 mA
80 mA
70 mA
60 mA
50 mA
40 mA
30 mA
20 mA
10 mA
MAX.
MIN.
MAX.
MIN.
I
, I
@ 0.4V
PIO–A
PIO–B
NOTES:
1. All voltages are referenced to ground.
2. V
PUP
, V
PUPA
, V
PUPB
= external pull–up voltage.
3. Input load is to ground.
4. An additional reset or communication sequence cannot begin until the reset high time has expired.
5. Read data setup time refers to the time the host must pull the 1–Wire bus low to read a bit. Data is guaranteed
to be valid within 1
μ
s of this falling edge and will remain valid for 14
μ
s minimum (15
μ
s total from falling edge
on 1–Wire bus).
6. V
IH
is a function of the chip–internal supply voltage. This voltage is determined by either the external pull–up resis-
tor and V
PUP
or the V
CC
supply, whichever is higher.
7. Capacitance on the data pin could be 800 pF when power is first applied. If a 5k
resistor is used to pull up the
data line to V
PUP
, 5
μ
s after power has been applied the parasite capacitance will not affect normal communica-
tions.
8. t
RSTL
should be limited to maximum 5 ms. Otherwise the DS2407 may perform a power–on reset.
9. Input resistance is to ground.
10.V
CC
must be at least 4.0V if it is to be connected during a programming pulse.
11. If the current at PIO–A reaches 200 mA the gate voltage of the output transistor will be reduced to limit the sink
current to 200 mA. The user–supplied circuitry should limit the current flow through the PIO–transistor to no more
than 100 mA. Otherwise the DS2407 may be damaged.
12.PIO–A has a controlled turn–on output. The indicated currents are DC values. At V
PUP
= 4.0V or higher the sink
current typically reaches 80% of its DC value 1
μ
s after turning on the transistor.
13.Under certain low voltage conditions V
ILMAX
may have to be reduced to as much as 0.5V to always guarantee
a presence pulse.
14.The input load current may be as high as 100
μ
A after a power–on reset until a memory function command byte
has been sent as well as during the execution of a ROM function command.
15.If the device is disconnected from the 1–Wire bus (data pin floating) channel A may lose its output status even
if V
CC
is connected. A resistor of approximately 100 k
between V
CC
and data will maintain the status of
channel A.
16.Without V
CC
supply, V
IH
for either PIO pin should always be greater than or equal to V
PUP
–0.3V.
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