參數(shù)資料
型號(hào): DS1243Y-150
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: Timer or RTC
英文描述: 0 TIMER(S), REAL TIME CLOCK, PDIP28
封裝: 0.720 INCH, ENCAPSULATED, DIP-28
文件頁數(shù): 10/13頁
文件大?。?/td> 245K
代理商: DS1243Y-150
DS1243Y
6 of 13
PHANTOM CLOCK REGISTER DEFINITION
Figure 2
AM-PM/12/24 MODE
Bit 7 of the hours register is defined as the 12- or 24-hour mode select bit. When high, the 12-hour mode
is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour mode,
bit 5 is the second 10-hour bit (20–23 hours).
OSCILLATOR AND RESET BITS
Bits 4 and 5 of the day register are used to control the RESET and oscillator functions. Bit 4 controls the
RESET
(pin 1). When the RESET bit is set to logic 1, the RESET input pin is ignored. When the RESET
bit is set to logic 0, a low input on the RESET pin will cause the Phantom Clock to abort data transfer
without changing data in the watch registers. Bit 5 controls the oscillator. When set to logic 1, the
oscillator is off. When set to logic 0, the oscillator turns on and the watch becomes operational. These
bits are shipped from the factory set to a logic 1, oscillator off.
ZERO BITS
Registers 1, 2, 3, 4, 5, and 6 contain one or more bits that always read logic 0. When writing these
locations, either a logic 1 or 0 is acceptable.
相關(guān)PDF資料
PDF描述
DS1243Y 0 TIMER(S), REAL TIME CLOCK, PDIP28
DS1244W-120 0 TIMER(S), REAL TIME CLOCK, PDIP28
DS1244YP-70 0 TIMER(S), REAL TIME CLOCK, DMA34
DS1244WP-120 0 TIMER(S), REAL TIME CLOCK, DMA34
DS1244Y-70 0 TIMER(S), REAL TIME CLOCK, PDMA28
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