參數(shù)資料
型號(hào): DG423DK
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: Improved Low-Power, CMOS Analog Switches with Latches
中文描述: DUAL 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP16
封裝: 0.300 INCH, CERDIP-16
文件頁(yè)數(shù): 3/12頁(yè)
文件大小: 132K
代理商: DG423DK
D
Improved Low-Power,
CMOS Analog S witc hes with Latc hes
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 15V, V- = -15V, V
L
= +5V, GND = 0V, V
INH
= +2.4V, V
INL
= +0.8V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
_______________________________________________________________________________________
3
T
A
= +25°C
T
A
= T
MIN
to T
MAX
All channels on or off,
V+ = 16.5V, V- = -16.5V,
V
IN
= 0V or 5V
All channels on or off,
V+ = 16.5V, V- = -16.5V,
V
IN
= 0V or 5V
All channels on or off,
V+ = 16.5V, V- = -16.5V,
V
IN
= 0V or 5V
I+
Positive Supply Current
CONDITIONS
SYMBOL
PARAMETER
μA
UNITS
-5.0
5.0
-1.0
0.01
1.0
MIN
TYP
(Note 2)
MAX
IN = 2.4V, all others = 0.8V
IN = 0.8V, all others = 2.4V
I
INH
I
INL
Input Current with Input Voltage High
Input Current with Input Voltage Low
SUPPLY
μA
μA
-0.50
-0.50
0.005
0.005
0.50
0.50
(Note 3)
V+, V-
Power Supply Range
V
±4.5
±20
T
A
= +25°C
T
A
= T
MIN
to T
MAX
I-
Negative Supply Current
μA
-5.0
5.0
-1.0
-0.01
1.0
T
A
= +25°C
T
A
= T
MIN
to T
MAX
All channels on or off,
V+ = 16.5V, V- = -16.5V,
V
IN
= 0V or 5V
I
GND
Ground Current
μA
-5.0
5.0
-1.0
-0.01
1.0
T
A
= +25°C
T
A
= T
MIN
to T
MAX
Figure 2
t
ON
Turn-On Time
ns
300
200
150
250
ns
Figure 2
t
OFF
Turn-Off Time
T
A
= +25°C
T
A
= -55°C to +125°C
T
A
= +25°C
T
A
= -55°C to +125°C
T
A
= +25°C
T
A
= -55°C to +125°C
T
A
= +25°C
V
S
= ±10V,
R
L
= 300
,
C
L
= 35pF,
Figure 3
t
WW
Latch Timing
ns
200
100
200
t
DW
100
60
t
WD
100
5
25
T
A
= +25°C
T
A
= T
MIN
to T
MAX
I
L
Logic Supply Current
μA
-5.0
5.0
-1.0
-0.01
1.0
Break-Before-Make Interval (Note 3)
t
D
DG423, Figure 4
C
L
= 10nF, V
G
= 0V,
R
G
= 0
, Figure 5
R
L
= 100
, C
L
= 5pF,
f = 1MHz, Figure 6
R
L
= 50
, C
L
= 5pF,
f = 1MHz, Figure 7
ns
T
A
= +25°C
10
15
Charge Injection (Note 3)
Q
pC
T
A
= +25°C
72
Off-Isolation Rejection Ratio
(Note 6)
OIRR
dB
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
T
A
= +25°C
12
12
39
39
Drain-Off Capacitance
Source-Off Capacitance
Drain-On Capacitance
Source-On Capacitance
C
D(OFF)
C
S(OFF)
C
D(ON)
C
S(ON)
f = 1MHz, Figure 8
f = 1MHz, Figure 8
f = 1MHz, Figure 9
f = 1MHz, Figure 9
pF
pF
pF
pF
T
A
= +25°C
90
Crosstalk (Note 7)
dB
Note 2:
Typical values are
for design aid only
, are not guaranteed, and are not subject to production testing. The algebraic convention,
where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet.
Note 3:
Guaranteed by design.
Note 4:
On-resistance match between channels and flatness are guaranteed only with bipolar-supply operation. Flatness is defined as the dif-
ference between the maximum and minimum value of on-resistance as measured at the extremes of the specified analog signal range.
Note 5:
Leakage parameters I
S(OFF)
, I
D(OFF)
, and I
D(ON)
are 100% tested at the maximum rated hot temperature and guaranteed by
correlation at +25°C.
Note 6:
Off-Isolation Rejection Ratio = 20log (V
D
/V
S
), V
D
= output, V
S
= input to off switch.
Note 7:
Between any two switches.
INPUT
DYNAMIC
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