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參數(shù)資料
| 型號： | CY22180 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Very Low Jitter Field and Factory Programmable Clock Generator |
| 中文描述： | 抖動非常低場和工廠可編程時鐘發(fā)生器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 207K |
| 代理商： | CY22180 |
PRELIMINARY
Very Low Jitter Field and Factory
Programmable Clock Generator
CY22180
Cypress Semiconductor Corporation
Document #: 001-15577 Rev. **
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised May 10, 2007
Features
Low period and cycle-to-cycle jitter
— Typical pk-pk period jitter: 60 ps
Wide output frequency range
— Commercial temperature: 20–200 MHz
— Industrial temperature: 20–166 MHz
Input frequency range
— External crystal: 10–30 MHz fundamental crystal
— External reference: 10–133 MHz clock
Integrated phase-locked loop (PLL)
Field programmable and factory programmed options
Programmable crystal load capacitor tuning array
3.3V operation
Commercial and industrial temperature ranges
Power down or output enable function
Benefits
Internal PLL generates up to 200 MHz output. Can generate
custom frequencies from an external crystal or a driven
source.
In-house programming of samples and prototype quantities
can be done using the CY3672-USB programmer and
CY3619 socket adapter. Production quantities are available
through Cypress’s value added distribution partners or by
using third party programmers from BP Microsystems, HiLo
Systems, and others.
Eliminates the need for expensive and difficult to use
higher-order crystals.
Enables fine-tuning of output clock frequency by adjusting
C
Load
of the crystal. Eliminates the need for external C
Load
capacitors.
Application compatibility in standard and low-power
systems
Enables low-power state or output clocks to High-Z state.
Logic Block Diagram
Pin Configuration
CY22180
8-pin SOIC
4
8
XIN/CLKIN
6
7
REFOUT
CLKOUT
XOUT
1
2
3
VDD
PD#/OE
VSS
NC
5
PLL
PROGRAMMABLE
CONFIGURATION
OUTPUT
DIVIDER
1
8
3
2
4
5
6
VDD
VSS
CLKOUT
REFOUT
XOUT
XIN/CLKIN
PD# or OE
C
XOUT
C
XIN
相關PDF資料 |
PDF描述 |
|---|---|
| CY22180FSXC | Very Low Jitter Field and Factory Programmable Clock Generator |
| CY22180FSXI | Very Low Jitter Field and Factory Programmable Clock Generator |
| CY22180SXC-XXX | Very Low Jitter Field and Factory Programmable Clock Generator |
| CY22180SXC-XXXT | Very Low Jitter Field and Factory Programmable Clock Generator |
| CY22180SXI-XXX | Very Low Jitter Field and Factory Programmable Clock Generator |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY22180FSXC | 功能描述:鎖相環(huán) - PLL Prgm Clock Gen Very Low Jitter RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY22180FSXCT | 功能描述:鎖相環(huán) - PLL Lo Jitter Clock Gen 10MHz-133MHz RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY22180FSXI | 功能描述:鎖相環(huán) - PLL Lo Jitter Clock Gen 10MHz-133MHz RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY22180FSXIT | 功能描述:鎖相環(huán) - PLL Lo Jitter Clock Gen 10MHz-133MHz RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY22180SXC-XXX | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Very Low Jitter Field and Factory Programmable Clock Generator |
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