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參數(shù)資料
| 型號(hào)： | CS8120YTVA5 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | Telecom Protection, 1.25A 600V TELECOM SMD |
| 中文描述： | 5V的，300mA的線性穩(wěn)壓器和啟用與復(fù)位 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 198K |
| 代理商： | CS8120YTVA5 |
If the input voltage rises above 26V (e.g. load dump), the
output shuts down. This response protects the internal cir-
cuitry and enables the IC to survive unexpected voltage
transients.
Using an emitter sense scheme, the amount of current
through the NPN pass transistor is monitored. Feedback
circuitry insures that the output current never exceeds a
preset limit.
Should the junction temperature of the power device
exceed 180C (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle heat
source in the IC.
The CS8120 contains two microprocessor compatible con-
trol functions:
and
ENABLE
(Figure 3).
Function
switches the output transistor. When the voltage
lead exceeds 2.9V typ, the output pass
transistor turns off, leaving a high impedance facing the
load. The IC will remain in Sleep mode, drawing only
250μA, until the voltage on the lead drops below 2.1V typ.
Hysteresis (800mV) is built into the
on the
function to
Figure 3: Circuit Waveforms for CS8120
provide good noise immunity.
Function
A
ers up (V
OUT
> V
OUT
- 100mV) or when V
OUT
drops out of
regulation (V
OUT
< V
OUT
- 140mV, typ). 40mV of hysteresis
is included in the function to minimize oscillations.
The
output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC, thereby
signal (low voltage) is generated as the IC pow-
Figure 4: RC Network for
Delay circuitry
guaranteeing that the
as 1V.
An external RC network on the
vides a sufficiently long delay for most microprocessor
based applications. RC values can be chosen using the fol-
lowing formula:
[
V
RST
D V
OUT
signal is valid for V
OUT
as low
lead (Figure 4) pro-
R
TOT
′
C
RST
where:
R
TOT
= R
RST
in parallel with R
IN,
R
IN
= μP port impedance,
C
RST
=
delay capacitor,
t
Delay
= desired delay time,
V
RST
= V
SAT
of
(0.7V @ turn - on), and
V
T
= μP logic threshold voltage.
lead
RESET
RESET
]
RESET
RESET
RESET
C
RST
R
RST
C
2
22
m
F
5V to
m
P
and
System
Power
to
m
P
RESET
Port
RESET
CS–8120
V
OUT
RESET
RESET
RESET
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
FOR 7V < V
IN
< 26V
V
OUT
V
RT(ON)
ENABLE
V
RT(OFF)
(1)
(2)
V
IN
V
IN(HI)
VR
PEAK
HI
LO
VR
PEAK
VR
SAT
RESET
ENABLE
ENABLE
ENABLE
RESET
ENABLE
Regulator Control Functions
5
Dt
Delay
ln
)
V
T
D V
OUT
(
Applications Notes
C
The circuit depicted in Figure 5 lets the microprocessor
control its power source, the CS8120 regulator. An I/O
port on the μP and the SWITCH port are used to drive the
base of Q1. When Q1 is driven into saturation, the voltage
on the
lead falls below its lower threshold. The
regulators output is switched out. When the drive cur-
rent is removed, the voltage on the
the output is switched off and the IC moves into Sleep
mode where it draws 250μA.
By coupling these two controls with
has added flexibility. Once the system is running, the
state of the SWITCH is irrelevant as long as the I/O port
continues to drive Q1. The μP can turn off its own power
lead rises,
, the system
by withdrawing drive current, once the SWITCH is open.
This software control at the I/O port allows the μP to fin-
ish key housekeeping functions before power is removed.
The logic options are summarized in Table 1 below
ENABLE
ENABLE
ENABLE
Circuit Description: continued
Table 1: Logic Control of CS8120 Output
μP I/O drive
SWITCH
ON
Closed
Open
OFF
Closed
Open
Output
ON
ON
ON
OFF
LOW
LOW
LOW
HIGH
ENABLE
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| CS8121YTVA5 | Multiconductor Cable; Number of Conductors:4; Conductor Size AWG:22; No. Strands x Strand Size:7 x 30; Jacket Material:Polypropylene; Number of Pairs:2; Features:Unshielded; Impedance:50ohm; Leaded Process Compatible:Yes RoHS Compliant: Yes |
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