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參數(shù)資料
| 型號(hào)： | CS8120 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | 5V, 300mA Linear Regulator with and ENABLE RESET |
| 中文描述： | 5V的，300mA的線性穩(wěn)壓器和啟用與復(fù)位 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 198K |
| 代理商： | CS8120 |
7
The maximum power dissipation for a single output regu-
lator (Figure 7) is:
P
D(max)
=
{
V
IN(max)
D V
OUT(min)
}
I
OUT(max)
+ V
IN(max)
I
Q
(1)
where:
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
OUT(max)
is the maximum output current for the applica-
tion, and
I
Q
is the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of P
D(max)
is known, the maximum permis-
sible value of R
Q
JA
can be calculated:
R
Q
JA
=
(2)
The value of R
JA
can then be compared with those in
the package section of the data sheet. Those packages
with R
Q
JA
's less than the calculated value in equation 2
will keep the die temperature below 150C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of R
Q
JA
:
R
Q
JA
= R
Q
JC
+ R
Q
CS
+ R
Q
SA
(3)
where:
R
Q
JC
= the junctionDtoDcase thermal resistance,
R
Q
CS
= the caseDtoDheatsink thermal resistance, and
R
Q
SA
= the heatsinkDtoDambient thermal resistance.
R
Q
JC
appears in the package section of the data sheet. Like
R
JA
, it too is a function of package type. R
CS
and R
SA
are functions of the package type, heatsink and the inter-
face between them. These values appear in heat sink data
sheets of heat sink manufacturers.
150C - T
A
P
D
Calculating Power Dissipation
in a Single Output Linear Regulator
Application Notes: continued
Heat Sinks
V
IN
Smart
Regulator
V
OUT
I
OUT
I
IN
I
Q
Control
Features
}
Figure 7. Single output regulator with key performance parameters
labeled.
C
RESET
V
OUT
R
RST
C
2
**
10
m
F
C
RST
ENABLE
V
IN
C
1
*
0.1
m
F
to
m
P
RESET
Port
5V to
m
P and
System
Power
CS-8120
Figure 6. Circuit showing output compensation capacitor.
*C
1
is required if regulator is far from power source filter.
**C
2
is required for stability.
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