參數(shù)資料
型號(hào): CS8101YDWFR20
廠商: ZF Electronics Corporation
英文描述: Micropower 5V, 100mA Low Dropout Linear Regulator with RESET and ENABLE
中文描述: 微5V的,100mA的低壓差線性穩(wěn)壓器的復(fù)位和啟用
文件頁(yè)數(shù): 4/8頁(yè)
文件大小: 196K
代理商: CS8101YDWFR20
Figure 3. RC Network for
Delay
An external RC network on the
vides a sufficiently long delay for most microprocessor
lead (Figure 3) pro-
based applications. RC values can be chosen using the
following formula:
[
ln
Dt
Delay
R
TOT
C
RST
=
]
where:
R
RST
=
Delay resistor
R
IN
= μP port impedance
R
TOT
= R
RST
in parallel with R
IN
C
RST
=
Delay capacitor
t
Delay
= desired delay time
V
RST
= V
SAT
of
lead (0.7V @ turn - ON)
V
T
=
threshold
RESET
RESET
RESET
RESET
)
V
T
D V
OUT
V
RST
D V
OUT
(
RESET
RESET
RESET
CS8101
V
OUT
C
RST
R
RST
C
OUT
5V to
m
P
and
System
Power
to
m
P
RESET
Port
The circuit depicted in Figure 4 lets the microprocessor
control its power source, the CS8101 regulator. An I/O
port on the μP and the SWITCH port are used to drive the
base of Q1. When Q1 is driven into saturation, the voltage
on the
lead falls below its lower threshold. The
regulators output is enabled. When the drive current is
removed, the voltage on the
put is switched off and the IC moves into Sleep mode
where it draws 50μA (max).
lead rises, the out-
By coupling these two controls with the
system has added flexibility. Once the system is running,
the state of the SWITCH is irrelevant as long as the I/O
port continues to drive Q1. The microprocessor can turn
off its own power by withdrawing drive current, once the
SWITCH is open. This software control at the I/O port
allows the microprocessor to finish key housekeeping
functions before power is removed.
The logic options are summarized in Table 1.
lead, the
ENABLE
ENABLE
ENABLE
4
C
Applications Notes
Circuit Description: continued
0.1
m
F
V
IN
Gnd
CS8101
V
OUT
500k
W
Q
1
500k
W
100k
W
100k
W
C
RST
R
RST
C
OUT
V
CC
I/O Port
m
P
SWITCH
V
BAT
RESET
ENABLE
RESET
Figure 4. Microprocessor Control of CS8101 using external switching transistor Q
1
.
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