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參數(shù)資料
| 型號： | CDB42L51 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | Silver Mica Capacitor; Capacitance:120pF; Capacitance Tolerance:+/- 5%; Series:CDV16; Voltage Rating:1000VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.94mm; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| 中文描述： | 低功耗，立體聲耳機(jī)放大器編解碼器 |
| 文件頁數(shù)： | 82/83頁 |
| 文件大?。?/td> | 1348K |
| 代理商： | CDB42L51 |
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82
DS679A2
CS42L51
15.REVISION HISTORY
Rev.
A1
A2
Date
Changes
May 2005
September 2005
Initial Release subject to legal notice.
Renamed
pin 14, FILT1+, to DAC_FILT+ and pin 16, FILT2+, to ADC_FILT+.
Added
1.5 μF capacitor recommendation to figure
“Typical Connection Diagram (Software Mode)”
on page 10
.
Removed
the 0.1μF capacitors from pins DAC_FILT+, ADC_FILT+ and VQ on the figures
“Typical
Connection Diagram (Software Mode)” on page 10
and
“Typical Connection Diagram (Hardware
Mode)” on page 11
.
Added
DAC Isolation specification to
“Analog Input Characteristics (Commercial - CNZ)” on
page 13
and
“Analog Input Characteristics (Automotive - DNZ)” on page 14
.
Corrected
specification table
“Headphone Output Power Characteristics” on page 19
.
Removed
t
d
timing specification from table in section
“Switching Specifications - Serial Port” on
page 20
.
Added
t
s(SDO-SK)
and t
h(SK-SDO)
timing specification to table in section
“Switching Specifications -
Serial Port” on page 20
.
Adjusted
timing specifications t
s(SD-SK)
from 0 ns to 20 ns and t
h
from 50 ns to 20 ns in table in sec-
tion
“Switching Specifications - Serial Port” on page 20
.
Added
MIC Bias PSRR specification to
“DC Electrical Characteristics” on page 24
.
Adjusted
specification table
“Power Consumption” on page 25
.
Removed
QSM clock ratios 128, 192, 256, 384 and HSM ratios 128, 192 from
Table 3 on page 37
.
Modified
Digital Mix description in section
“Digital Mix (DIGMIX)” on page 50
.
Corrected
DAC Zero Cross timeout period in section
“Zero Cross” on page 56
.
Adjusted
BEEP off time settings in section
“Beep Off Time (OFFTIME[2:0])” on page 61
.
Modified
BEEP description in section
“Beep (BEEP)” on page 62
.
Adjusted
the minimum settings for the
“Noise Gate Boost (NG_BOOST) and Threshold
(THRESH[3:0])” on page 70
.
Swapped
bits PCMA_OVFL w/PCMB_OVFL and ADCA_OVFL w/ADCB_OVFL in register
“Status
(Address 20h) (Read Only)” on page 71
.
Corrected
Charge Pump Frequency setting in section
“Charge Pump Frequency
(CHRG_FREQ[3:0])” on page 71
.
Added
sections
“Headphone THD+N versus Output Power Plots” on page 72
and
“ADC_FILT+
Capacitor Effects on THD+N” on page 74
.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB42L51/FAE | 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk |
| CDB42L52 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd LP CODEC w/classD Spkr Driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L52/FAE | 制造商:Cirrus Logic 功能描述:EVAL BD LOW-VOLTAGE STEREO CODEC - Bulk |
| CDB42L55 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L56 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 24Bit Ultra LP Ster CD w/clH HP RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
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