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參數(shù)資料
| 型號： | CDB42L50 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No |
| 中文描述： | 低電壓，立體聲耳機放大器編解碼器 |
| 文件頁數(shù)： | 77/83頁 |
| 文件大?。?/td> | 1348K |
| 代理商： | CDB42L50 |
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DS679A2
77
CS42L51
9. PCB LAYOUT CONSIDERATIONS
9.1
Power Supply, Grounding
As with any high resolution converter, the
CS42L51
requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. Figure 1 on page 10 shows the recommended
power arrangements, with VA and VA_HP connected to clean supplies. VD, which powers the digital circuit-
ry, may be run from the system logic supply. Alternatively, VD may be powered from the analog supply via
a ferrite bead. In this case, no additional devices should be powered from VD.
Extensive use of power and ground planes, ground plane fill in unused areas and surface mount decoupling
capacitors are recommended. Decoupling capacitors should be as close to the pins of the
CS42L51
as pos-
sible. The low value ceramic capacitor should be closest to the pin and should be mounted on the same
side of the board as the
CS42L51
to minimize inductance effects. All signals, especially clocks, should be
kept away from the DAC_FILT+/ADC_FILT+ and VQ pins in order to avoid unwanted coupling into the mod-
ulators. The DAC_FILT+/ADC_FILT+ and VQ decoupling capacitors, particularly the 0.1 μF, must be posi-
tioned to minimize the electrical path from DAC_FILT+/ADC_FILT+ and AGND. The CDB42L51 evaluation
board demonstrates the optimum layout and power supply arrangements.
9.2
QFN Thermal Pad
The CS42L51 is available in a compact QFN package. The under side of the QFN package reveals a large
metal pad that serves as a thermal relief to provide for maximum heat dissipation. This pad must mate with
an equally dimensioned copper pad on the PCB and must be electrically connected to ground. A series of
vias should be used to connect this copper pad to one or more larger ground planes on other PCB layers.
In split ground systems, it is recommended that this thermal pad be connected to AGND for best perfor-
mance. The CS42L51 evaluation board demonstrates the optimum thermal pad and via configuration.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CDB42L51 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd Low-volt CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L51/FAE | 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk |
| CDB42L52 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd LP CODEC w/classD Spkr Driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L52/FAE | 制造商:Cirrus Logic 功能描述:EVAL BD LOW-VOLTAGE STEREO CODEC - Bulk |
| CDB42L55 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
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