Figure 1. Typical Connection Diagram (Softwar" />
參數(shù)資料
型號(hào)： CDB42L50
廠商： Cirrus Logic, Inc.
英文描述： Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No
中文描述： 低電壓，立體聲耳機(jī)放大器編解碼器
文件頁(yè)數(shù)： 6/83頁(yè)
文件大小： 1348K
代理商： CDB42L50
6
DS679A2
CS42L51
LIST OF FIGURES
Figure 2. Typical Connection Diagram (Hardware Mode)......................................................................... 11
Figure 3. Headphone Output Test Load.................................................................................................... 19
Figure 4. Serial Audio Interface Slave Mode Timing................................................................................. 21
Figure 5. TDM Serial Audio Interface Timing............................................................................................ 21
Figure 6. Serial Audio Interface Master Mode Timing............................................................................... 21
Figure 7. Control Port Timing - I2C............................................................................................................ 22
Figure 8. Control Port Timing - SPI Format............................................................................................... 23
Figure 9. Analog Input Architecture........................................................................................................... 28
Figure 10. MIC Input Mix w/Common Mode Rejection.............................................................................. 30
Figure 11. Differential Input....................................................................................................................... 30
Figure 12. ALC.......................................................................................................................................... 31
Figure 13. Noise Gate Attenuation............................................................................................................ 32
Figure 14. Output Architecture.................................................................................................................. 33
Figure 15. De-Emphasis Curve................................................................................................................. 33
Figure 16. Beep Configuration Options..................................................................................................... 34
Figure 17. Peak Detect & Limiter.............................................................................................................. 35
Figure 18. Master Mode Timing................................................................................................................ 38
Figure 19. Tri-State Serial Port ................................................................................................................. 38
Figure 20. I2S Format................................................................................................................................ 39
Figure 21. Left-Justified Format................................................................................................................ 39
Figure 22. Right-Justified Format (DAC only)........................................................................................... 39
Figure 23. Initialization Flow Chart............................................................................................................ 41
Figure 24. Control Port Timing in SPI Mode ............................................................................................. 42
Figure 25. Control Port Timing, I2C Write.................................................................................................. 43
Figure 26. Control Port Timing, I2C Read.................................................................................................. 43
Figure 27. AIN & PGA Selection............................................................................................................... 53
Figure 28. THD+N vs. Ouput Power per Channel at 1.8 V (16
load) .................................................... 72
Figure 29. THD+N vs. Ouput Power per Channel at 2.5 V (16
load) .................................................... 72
Figure 30. THD+N vs. Ouput Power per Channel at 1.8 V (32
load) .................................................... 73
Figure 31. THD+N vs. Ouput Power per Channel at 2.5 V (32
load) .................................................... 73
Figure 32. ADC THD+N vs. Frequency w/Capacitor Effects..................................................................... 74
Figure 33. ADC Passband Ripple............................................................................................................. 78
Figure 34. ADC Stopband Rejection......................................................................................................... 78
Figure 35. DAC Passband Ripple............................................................................................................. 78
Figure 36. DAC Stopband......................................................................................................................... 78
Figure 35. DAC Transition Band............................................................................................................... 78
Figure 36. DAC Transition Band (Detail)................................................................................................... 78
Figure 35. ADC Transition Band............................................................................................................... 78
Figure 36. ADC Transition Band (Detail)................................................................................................... 78
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB42L51 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd Low-volt CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類(lèi)型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB42L51/FAE 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk
CDB42L52 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd LP CODEC w/classD Spkr Driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類(lèi)型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB42L52/FAE 制造商:Cirrus Logic 功能描述:EVAL BD LOW-VOLTAGE STEREO CODEC - Bulk
CDB42L55 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類(lèi)型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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