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參數(shù)資料
| 型號： | CDB42L50 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No |
| 中文描述： | 低電壓，立體聲耳機(jī)放大器編解碼器 |
| 文件頁數(shù)： | 43/83頁 |
| 文件大小： | 1348K |
| 代理商： | CDB42L50 |
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DS679A2
43
CS42L51
the contents of the register pointed to by the MAP will be output. Setting the auto increment bit in MAP
allows successive reads or writes of consecutive registers. Each byte is separated by an acknowledge
bit. The ACK bit is output from the
CS42L51
after each input byte is read, and is input to the
CS42L51
from
the microcontroller after each transmitted byte.
Since the read operation can not set the MAP, an aborted write operation is used as a preamble. As
shown in
Figure 26
, the write operation is aborted after the acknowledge for the MAP byte by sending a
stop condition. The following pseudocode illustrates an aborted write operation followed by a read oper-
ation.
Send start condition.
Send 100101x0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte, auto increment off.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 100101x1(chip address & read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
Setting the auto increment bit in the MAP allows successive reads or writes of consecutive registers. Each
byte is separated by an acknowledge bit.
4 5 6 7
24 25
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
DATA +1
START
ACK
STOP
ACK
ACK
ACK
1 0 0 1 0 1 AD0 0
SDA
INCR
6 5 4 3 2 1 0
7 6 1 0
7 6 1 0
7 6 1 0
0 1 2 3
8 9
12
16 17 18 19
10 11
13 14 15
27 28
26
DATA +n
Figure 25. Control Port Timing, I2C Write
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
DATA +1
START
ACK
STOP
ACK
ACK
ACK
1 0 0 1 0 1 AD0 0
SDA
1 0 0 1 0 1 AD0 1
CHIP ADDRESS (READ)
START
INCR
6 5 4 3 2 1 0
7 0
7 0
7 0
NO
16
8 9
12 13 14 15
4 5 6 7
0 1
20 21 22 23 24
26 27 28
2 3
10 11
17 18 19
25
ACK
DATA + n
STOP
Figure 26. Control Port Timing, I2C Read
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB42L51 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd Low-volt CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L51/FAE | 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk |
| CDB42L52 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd LP CODEC w/classD Spkr Driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L52/FAE | 制造商:Cirrus Logic 功能描述:EVAL BD LOW-VOLTAGE STEREO CODEC - Bulk |
| CDB42L55 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
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