參數(shù)資料
型號: CDB42L50
廠商: Cirrus Logic, Inc.
英文描述: Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No
中文描述: 低電壓,立體聲耳機(jī)放大器編解碼器
文件頁數(shù): 31/83頁
文件大?。?/td> 1348K
代理商: CDB42L50
DS679A2
31
CS42L51
4.3.6
MIC & PGA Gain
The MIC-level input passes through a +16 dB or +32 dB analog gain stage prior to the input multiplexer,
allowing it to be used for microphone level signals without the need for any external gain. The PGA must
be powered up when using the MIC pre-amp.
The PGA stage provides an additional +12 dB to -3 dB of analog gain in 0.5 dB steps.
4.3.7
Automatic Level Control (ALC)
When enabled, the ALC monitors the analog input signal after the digital attenuator, detects when peak
levels exceed the maximum threshold settings and lowers, first, the PGA gain settings and then increases
the digital attenuation levels at a programmable attack rate and maintains the resulting level below the
maximum threshold.
When input signal levels fall below the minimum threshold, digital attenuation levels are decreased first
and the PGA gain is then increased at a programmable release rate and maintains the resulting level be-
low the minimum threshold.
Attack and release rates are affected by the ADC soft ramp/zero cross settings and sample rate, Fs. ALC
soft ramp and zero cross dependency may be independently enabled/disabled.
Recommended settings
: Best level control may be realized with the fastest attack and slowest release
setting with soft ramp enabled in the control registers.
NOTE:
When the ALC is enabled the PGA and At-
tenuator is automatically controlled and should not be adjusted manually.
Software
Controls:
“Power Control 1 (Address 02h)” on page 47
,
“ADCx Input Select, Invert & Mute (Address 07h)” on
page 53
,
“ALCX & PGAX Control: ALCA, PGAA (Address 0Ah) & ALCB, PGAB (Address 0Bh)” on
page 56
,
“MIC Control (Address 05h)” on page 51
.
Software
Controls:
“ALC Enable & Attack Rate (Address 1Ch)” on page 67
,
“ALC Release Rate (Address 1Dh)” on
page 68
,
“ALC Threshold (Address 1Eh)” on page 69
,
“ALCX & PGAX Control: ALCA, PGAA
(Address 0Ah) & ALCB, PGAB (Address 0Bh)” on page 56
.
Output
(after ALC)
Input
RRATE[5:0]
PGA Gain and/or
Attenuator
ALC
MAX[2:0]
below full scale
ARATE[5:0]
MIN[2:0]
below full scale
MIN[2:0]
below full scale
MAX[2:0]
below full scale
ADCx_ATT[7:0] and
PGAx_VOL[4:0] volume
controls should
NOT
be
adjusted manually when
ALCx is enabled.
Figure 12. ALC
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