參數(shù)資料
型號(hào): CDB42L50
廠商: Cirrus Logic, Inc.
英文描述: Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No
中文描述: 低電壓,立體聲耳機(jī)放大器編解碼器
文件頁數(shù): 28/83頁
文件大?。?/td> 1348K
代理商: CDB42L50
28
DS679A2
CS42L51
4.3
Analog Inputs
AINxA and AINxB are the analog inputs, internally biased to VQ, that accepts line-level and MIC-level sig-
nals, allowing various gain and signal adjustments for each channel.
4.3.1
Digital Code, Offset & DC Measurement
The ADC output data is in two’s complement binary format. For inputs above positive full-scale or below
negative full-scale, the ADC will output 7FFFFFH or 800000H, respectively and cause the ADC overflow
bit to be set to a ‘1’.
Given the two’s complement format, low-level signals may cause the MSB of the serial data to periodically
toggle between ‘1’ and ‘0’, possibly introducing noise into the system as the bit switches back and forth.
To prevent this phenomena, a constant DC offset is added to the serial data bringing the low-level signal
just above the point at which the MSB would normally toggle, thus reducing the noise introduced.
The CODEC may be used to measure DC voltages by disabling the high-pass filter for the designated
channel. DC levels are measured relative to VQ and will be decoded as positive two’s complement binary
numbers above VQ and negative two’s complement binary numbers below VQ.
Software
Controls:
“Status (Address 20h) (Read Only)” on page 71
,
“ADC Control (Address 06h)” on page 52
.
OvADC
AIN3A/ MICIN1
MICA_BOOST
Attenuator
ALC
PGAA_VOL[5:0]
ADC_SNGVOL
SOFTA
ZCROSSA
0/-96dB
1dB steps
ADCA_ATT[7:0]
ADCA_HPF ENABLE
ADCA_HPF FREEZE
PDN_ADCA
ADCA_MUTE
SOFTA
ALC_ENA
ALCB_SRDIS
ALCB_ZCDIS
PDN_MICA
MICBIAS
PDN_MICBIAS
MICBIAS_LVL[1:0]
P
MICBIAS_SEL
TO SIGNAL PROCESSING
ENGINE (SPE)
INV_ADCA
ALC_ARATE[5:0]
ALC_RRATE[5:0]
MAX[2:0]
MIN[2:0]
ALC_ENB
ALCA_SRDIS
ALCA_ZCDIS
MUX
AIN1A
AIN2A
PGA
+16/
32 dB
AINA_MUX[1:0]
PDN_PGAA
+12/-3dB
0.5dB steps
Multibit
OveADC
AIN3B/ MICIN2/
MICBIAS
MICB_BOOST
PGAB_VOL[5:0]
ADC_SNGVOL
ZCROSSB
0/-96dB
1dB steps
ADCB_ATT[7:0]
ADCB_HPF ENABLE
ADCB_HPF FREEZE
PDN_ADCB
ADCB_MUTE
SOFTB
PDN_MICB
INV_ADCB
MUX
AIN1B
AIN2B/MICBIAS
PGA
+16/
32 dB
AINB_MUX[1:0]
PDN_PGAB
+12/-3dB
0.5dB steps
Noise Gate
NG_ALL
NG_EN
THRESH[3:0]
NGDELAY[1:0]
Attenuator
Boost
ADCA_DBOOST
+20dB
Boost
ADCB_DBOOST
Σ
MUX
MUX
MICMIX
MUX
MUX
FROM SIGNAL
PROCESSING ENGINE (SPE)
DIGMIX
Figure 9. Analog Input Architecture
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CDB42L52 功能描述:音頻 IC 開發(fā)工具 Eval Bd LP CODEC w/classD Spkr Driver RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB42L52/FAE 制造商:Cirrus Logic 功能描述:EVAL BD LOW-VOLTAGE STEREO CODEC - Bulk
CDB42L55 功能描述:音頻 IC 開發(fā)工具 Eval Bd Ultra Low PWR Stereo Codec RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V