參數(shù)資料
型號: CDB42L50
廠商: Cirrus Logic, Inc.
英文描述: Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No
中文描述: 低電壓,立體聲耳機(jī)放大器編解碼器
文件頁數(shù): 22/83頁
文件大小: 1348K
代理商: CDB42L50
22
DS679A2
CS42L51
SWITCHING SPECIFICATIONS - I2C CONTROL PORT
(Inputs: Logic 0 = DGND, Logic 1 = VL, SDA C
L
= 30 pF)
Notes:
18. Data must be held for sufficient time to bridge the transition time, t
fc
, of SCL.
Parameter
Symbol
f
scl
t
irs
t
buf
t
hdst
t
low
t
high
t
sust
t
hdd
t
sud
t
rc
t
fc
t
susp
t
ack
Min
-
500
Max
100
-
Unit
kHz
ns
SCL Clock Frequency
RESET
Rising Edge to Start
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
Acknowledge Delay from SCL Falling
4.7
4.0
4.7
4.0
4.7
0
250
-
-
4.7
300
-
-
-
-
-
-
-
1
μs
μs
μs
μs
μs
μs
ns
μs
ns
μs
ns
(Note 18)
300
-
1000
tbuf
thdst
thdst
tlow
tr
tf
thdd
thigh
tsud
tsust
tsusp
Stop
Start
Start
Stop
Repeated
SDA
SCL
tirs
RST
Figure 7. Control Port Timing - I2C
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