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參數(shù)資料
| 型號： | CDB4272 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 24-Bit, 192 kHz Stereo Audio CODEC |
| 中文描述： | 24位192千赫立體聲音頻CODEC |
| 文件頁數(shù)： | 8/53頁 |
| 文件大小： | 1200K |
| 代理商： | CDB4272 |
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CS4272
8
DS593F1
Pin Name
#
Pin Description
XTO
XTI
1,2
Crystal Connections
(
Input/Output
) - I/O pins for an external crystal which may be used to generate the
master clock. See “Crystal Applications (XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on
page 27.
MCLK
3
Master Clock
(
Input/Output
) -Clock source for the delta-sigma modulators. See “Crystal Applications
(XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
LRCK
4
Left Right Clock
(Input/Output
) -
Determines which channel, Left or Right, is currently active on the
serial audio data line.
SCLK
5
Serial Clock
(Input/Output
) -
Serial clock for the serial audio interface.
SDOUT
(M/S)
6
Serial Audio Data Output
(
Output
)
-
Output for two’s complement serial audio data. This pin must be
pulled-up or pulled-down to select Master or Slave Mode. See “Master/Slave Mode” on page 24.
SDIN
7
Serial Audio Data Input
(
Input
) - Input for two’s complement serial audio data.
DGND
8
Digital Ground
(
Input
) - Ground reference for the internal digital section.
VD
9
Digital Power
(
Input
)
-
Positive power for the internal digital section.
VL
10
Logic Power
(
Input
) - Positive power for the digital input/output interface.
M0
11
Mode Select 0
(
Input
) - In conjunction with M1, selects operating mode. Functionality is described in the
Hardware Mode Speed Configuration table.
M1
12
Mode Select 1
(
Input
) - In conjunction with M0, selects operating mode. Functionality is described in the
Hardware Mode Speed Configuration table.
I2S/LJ
13
Serial Audio Interface Select
(Input)
- Selects either the left-justified or I
2
S format for the Serial Audio
Interface.
RST
14
Reset
(
Input
) - The device enters a low power mode when this pin is driven low.
VCOM
15
Common Mode Voltage
(
Output
)
-
Filter connection for internal common mode voltage.
AINA-
AINA+
AINB+
AINB-
16,
17,
18,
19
Differential Analog Input
(
Input
)
-
The full scale differential input signals are presented to the delta-
sigma modulators. The full scale level is specified in the ADC Analog Characteristics specification table.
VA
20
Analog Power
(Input)
-
Positive power for the internal analog section.
AGND
21
Analog Ground
(
Input
) - Ground reference for the internal analog section.
FILT+
22
Positive Voltage Reference
(
Output
)
-
Positive reference voltage for the internal sampling circuits.
AMUTEC
23
Channel A Mute Control
(Output)
-
This pin is active during power-up initialization, reset, muting, when
master clock to left/right clock frequency ratio is incorrect, or power-down.
AOUTA-
AOUTA+
AOUTB+
AOUTB-
24,
25,
26,
27
Differential Analog Audio Output
(
Output
) - The full scale differential output level is specified in the
Analog Characteristics specification table.
BMUTEC
28
Channel B Mute Control
(Output)
-
This pin is active during power-up initialization, reset, muting, when
master clock to left/right clock frequency ratio is incorrect, or power-down.
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