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參數(shù)資料
| 型號： | CDB4272 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 24-Bit, 192 kHz Stereo Audio CODEC |
| 中文描述： | 24位192千赫立體聲音頻CODEC |
| 文件頁數(shù)： | 42/53頁 |
| 文件大?。?/td> | 1200K |
| 代理商： | CDB4272 |
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CS4272
42
DS593F1
8.4
DAC Channel A Volume Control - Address 04h
See 8.5 DAC Channel B Volume Control - Address 05h
8.5
DAC Channel B Volume Control - Address 05h
8.5.1
Mute (Bit 7)
Function:
The DAC output will mute when this bit is set. Though this bit is active high, it should be noted that
the MUTEC pins are active low. The common mode voltage on the output will be retained when this
bit is set. The muting function is effected, similar to attenuation changes, by the Soft and ZeroCross
bits in the Volume and Mixing Control register. The MUTEC pin for the respective channel will become
active during the mute period if the MUTE bit is set. Both the AMUTEC and BMUTEC will become
active if either MUTE register is enabled and the MUTECB=A bit (register 7) is enabled.
8.5.2
Volume Control (Bits 6:0)
Function:
The digital volume control allows the user to attenuate the signal in 1 dB increments from 0 to -127 dB.
Volume settings are decoded as shown in Table 16. The volume changes are implemented as dictat-
ed by the Soft and ZeroCross bits in the DAC Volume & Mixing Control register (see section 8.3.2).
Table 15. ATAPI Decode
ATAPI3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ATAPI2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
ATAPI1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ATAPI0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
AOUTA
MUTE
MUTE
MUTE
MUTE
aR
aR
aR
aR
aL
aL
aL
aL
a[(L+R)/2]
a[(L+R)/2]
a[(L+R)/2]
a[(L+R)/2]
AOUTB
MUTE
bR
bL
b[(L+R)/2]
MUTE
bR
bL
b[(L+R)/2]
MUTE
bR
bL
b[(L+R)/2]
MUTE
bR
bL
b[(L+R)/2]
7
6
5
4
3
2
1
0
MUTE
VOL6
VOL5
VOL4
VOL3
VOL2
VOL1
VOL0
Table 16. Digital Volume Control Example Settings
Binary Code
0000000
0010100
0101000
0111100
1011010
Decimal Value
0
20
40
60
90
Volume Setting
0 dB
-20 dB
-40 dB
-60 dB
-90 dB
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