參數(shù)資料
型號(hào): CDB4271
廠商: Cirrus Logic, Inc.
元件分類(lèi): Codec
英文描述: 24-Bit, 192 kHz Stereo Audio CODEC
中文描述: 24位192千赫立體聲音頻CODEC
文件頁(yè)數(shù): 43/53頁(yè)
文件大?。?/td> 1199K
代理商: CDB4271
CS4271
DS592F1
43
8.6
ADC Control - Address 06h
8.6.1
Dither for 16-Bit Data (Bit 5)
Function:
When set, this bit activates the Dither for 16-Bit Data feature as described in “Dither for 16-Bit Data”
on page 30.
8.6.2
ADC Digital Interface Format (Bit 4)
Function:
The required relationship between LRCK, SCLK and SDOUT for the ADC is defined by the ADC Dig-
ital Interface Format. The options are detailed in Table 17 and may be seen in Figure 3 and 4.
8.6.3
ADC Channel A & B Mute (Bits 3:2)
Function:
When this bit is set, the output of the ADC for the selected channel will be muted.
8.6.4
Channel A & B High Pass Filter Disable (Bits 1:0)
Function:
When this bit is set, the internal high-pass filter for the selected channel will be disabled.The current
DC offset value will be frozen and continue to be subtracted from the conversion result. See “High
Pass Filter and DC Offset Calibration” on page 30.
8.7
Mode Control 2 - Address 07h
8.7.1
Digital Loopback (Bit 4)
Function:
When this bit is set, an internal digital loopback from the ADC to the DAC will be enabled. Please refer
to “Internal Digital Loopback” on page 30.
8.7.2
AMUTEC = BMUTEC (Bit 3)
Function:
When this function is enabled, the individual controls for AMUTEC and BMUTEC are internally con-
nected through an AND gate prior to the output pins. Therefore, the external AMUTEC and BMUTEC
pins will go active only when the requirements for both AMUTEC and BMUTEC are valid.
7
6
5
4
3
2
1
0
Reserved
Reserved
Dither16
ADC_DIF
MUTEA
MUTEB
HPFDisableA
HPFDisableB
Table 17. ADC Digital Interface Formats
ADC_DIF
0
1
Description
Format
0
1
Figure
3
4
Left Justified, up to 24-bit data (default)
I
2
S, up to 24-bit data
7
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
LOOP
MUTECA=B
FREEZE
CPEN
PDN
相關(guān)PDF資料
PDF描述
CDB4272 24-Bit, 192 kHz Stereo Audio CODEC
CDB42L51 Silver Mica Capacitor; Capacitance:120pF; Capacitance Tolerance:+/- 5%; Series:CDV16; Voltage Rating:1000VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.94mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
CDB42L50 Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No
CDB43122 122dB, 24-Bit, 192kHz DAC for Digital Audio
CDB4327 Low Cost, 20-Bit, Stereo, Audio D/A Converter
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參數(shù)描述
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CDB42L51/FAE 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk