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參數(shù)資料
| 型號： | CDB4271 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 24-Bit, 192 kHz Stereo Audio CODEC |
| 中文描述： | 24位192千赫立體聲音頻CODEC |
| 文件頁數(shù)： | 36/53頁 |
| 文件大?。?/td> | 1199K |
| 代理商： | CDB4271 |
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CS4271
36
DS592F1
6.2
In
I2C
mode, SDA is a bi-directional data line. Data is clocked into and out of the part by the clock, SCL, with the clock
to data relationship as shown in Figure 18. There is no CS pin. Pin AD0 forms the partial chip address and should be
tied to VA or AGND as required. The upper 6 bits of the 7-bit address field must be 001000. To communicate with the
CS4271
,
the LSB of the chip address field, which is the first byte sent to the CS4271, should match the setting of the
AD0 pin. The eighth bit of the address byte is the R/W bit (high for a read, low for a write). If the operation is a write,
the next byte is the Memory Address Pointer, MAP, which selects the register to be read or written. The MAP is then
followed by the data to be written. If the operation is a read, then the contents of the register pointed to by the MAP will
be output after the chip address.
The CS4271 has MAP auto increment capability, enabled by the INCR bit in the MAP. If INCR is 0, then the MAP
will stay constant for successive writes. If INCR is set, then MAP will auto increment after each byte is written, al-
lowing block reads or writes of successive registers.
I2C
Mode
Table 10. Memory Address Pointer (MAP)
7
6
5
4
3
2
1
0
INCR
0
Reserved
0
Reserved
0
Reserved
0
MAP3
0
MAP2
0
MAP1
0
MAP0
0
INCR - Auto MAP Increment Enable
Default = ‘0’.
0 - Disabled
1 - Enabled
MAP(3:0) - Memory Address Pointer
Default = ‘0000’.
SDA
SCL
001000
ADDR
AD0
R/W
Start
ACK
DATA
1-8
ACK
DATA
1-8
ACK
Stop
Note: If operation is a write, this byte contains the Memory Address Pointer, MAP.
Note 1
Figure 18. Control Port Timing,
I2C
Mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDB4272 | 24-Bit, 192 kHz Stereo Audio CODEC |
| CDB42L51 | Silver Mica Capacitor; Capacitance:120pF; Capacitance Tolerance:+/- 5%; Series:CDV16; Voltage Rating:1000VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.94mm; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| CDB42L50 | Silver Mica Capacitor; Capacitance:100pF; Capacitance Tolerance:+/- 5%; Series:CDS; Voltage Rating:300VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:3mm; Leaded Process Compatible:No RoHS Compliant: No |
| CDB43122 | 122dB, 24-Bit, 192kHz DAC for Digital Audio |
| CDB4327 | Low Cost, 20-Bit, Stereo, Audio D/A Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB4272 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd CS4272 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4299 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd AC’97 CODEC w/SRC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L50 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low Voltage, Stereo CODEC with headphone Amp |
| CDB42L51 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd Low-volt CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42L51/FAE | 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR THE CS42L51 PORTABLE STEREO CODEC - Bulk |
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