1. PIN DESCRIPTIONS - SOFTWARE MODE ......." />
參數(shù)資料
型號: CDB4270
廠商: Cirrus Logic, Inc.
元件分類: Codec
英文描述: 24-Bit, 192 kHz Stereo Audio CODEC
中文描述: 24位192千赫立體聲音頻CODEC
文件頁數(shù): 3/48頁
文件大?。?/td> 730K
代理商: CDB4270
DS686A1
3
CS4270
TABLE OF CONTENTS
2. PIN DESCRIPTIONS - STAND-ALONE MODE ....................................................................... 7
3. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 8
SPECIFIED OPERATING CONDITIONS................................................................................. 8
ABSOLUTE MAXIMUM RATINGS........................................................................................... 8
THERMAL CHARACTERISTICS.............................................................................................. 8
DAC ANALOG CHARACTERISTICS (CS4270-CZZ)............................................................... 9
DAC ANALOG CHARACTERISTICS (CS4270-DZZ)............................................................... 9
DAC COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE................ 11
ADC ANALOG CHARACTERISTICS (CS4270-CZZ)............................................................. 12
ADC ANALOG CHARACTERISTICS (CS4270-DZZ)............................................................. 13
ADC ANALOG CHARACTERISTICS - ALL MODES ............................................................. 14
ADC DIGITAL FILTER CHARACTERISTICS ........................................................................ 14
DC ELECTRICAL CHARACTERISTICS ................................................................................ 15
DIGITAL CHARACTERISTICS............................................................................................... 16
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT................................................. 16
SWITCHING CHARACTERISTICS - I2C MODE CONTROL PORT....................................... 19
SWITCHING CHARACTERISTICS - SPI CONTROL PORT.................................................. 20
4. TYPICAL CONNECTION DIAGRAM ..................................................................................... 21
5. APPLICATIONS ..................................................................................................................... 22
5.1 Stand-Alone Mode ........................................................................................................... 22
5.1.1 Recommended Power-Up Sequence ................................................................. 22
5.1.2 Master/Slave Mode ............................................................................................. 22
5.1.3 System Clocking ................................................................................................. 22
5.1.4 Clock Ratio Selection .......................................................................................... 23
5.1.5 Interpolation Filter .............................................................................................. 23
5.1.6 High-Pass Filter .................................................................................................. 23
5.1.7 Mode Selection & De-Emphasis ......................................................................... 24
5.1.8 Serial Audio Interface Format Selection ............................................................. 24
5.2 Control Port Mode ........................................................................................................... 24
5.2.1 Recommended Power-Up Sequence - Access to Control Port Mode ................ 24
5.2.2 Master / Slave Mode Selection ........................................................................... 24
5.2.3 System Clocking ................................................................................................. 25
5.2.4 Clock Ratio Selection .......................................................................................... 25
5.2.5 Internal Digital Loopback .................................................................................... 26
5.2.6 Auto-Mute ........................................................................................................... 26
5.2.7 High-Pass Filter and DC Offset Calibration ........................................................ 26
5.2.8 De-Emphasis ...................................................................................................... 27
5.2.9 Oversampling Modes .......................................................................................... 27
5.3 De-Emphasis Filter .......................................................................................................... 27
5.4 Analog Connections ........................................................................................................ 28
5.4.1 Input Connections ............................................................................................... 28
5.4.2 Output Connections ............................................................................................ 29
5.5 Mute Control .................................................................................................................... 29
5.6 Synchronization of Multiple Devices ................................................................................ 30
5.7 Grounding and Power Supply Decoupling ....................................................................... 30
6. CONTROL PORT INTERFACE .............................................................................................. 31
6.1 SPI Mode ..................................................................................................................... 31
6.2 I2C Mode .......................................................................................................................... 32
7. REGISTER QUICK REFERENCE .......................................................................................... 33
8. REGISTER DESCRIPTION .................................................................................................... 34
8.1 Chip ID - Address 01h ..................................................................................................... 34
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