參數(shù)資料
型號(hào)： CDB42528
廠商： Cirrus Logic, Inc.
元件分類： Codec
英文描述： 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
中文描述： 114分貝192千赫6通道編解碼器與S / PDIF接收器
文件頁(yè)數(shù)： 33/90頁(yè)
文件大?。?/td> 1560K
代理商： CDB42528
DS585PP5
33
CS42526
4.6.4
One Line Mode(OLM) Configurations
4.6.4a
One Line Mode Configuration #1 can support up to 6 channels of DAC data, 6 channels of ADC data and
2 channels of S/PDIF received data. This is the only configuration which will support up to 24-bit samples
at a sampling frequency of 48 kHz on all channels for both the DAC and ADC.
OLM Config #1
Register / Bit Settings
Description
Functional Mode Register (addr = 03h)
Set CODEC_FMx = SAI_FMx = 00,01,10
Set ADC_SP SELx = 00
Interface Format Register (addr = 04h)
Set DIFx bits to proper serial format
Set ADC_OLx bits = 00,01,10
Set DAC_OLx bits = 00,01,10
Misc. Control Register (addr = 05h)
Set CODEC_SP M/S = 1
Set SAI_SP M/S = 1
Set EXT ADC SCLK = 0
CX_LRCK must equal SAI_LRCK; sample rate conversion not supported
Configure ADC data on CX_SDOUT, S/PDIF data on SAI_SDOUT
Select the digital interface format when not in one line mode
Select ADC operating mode, see table below for valid combinations
Select DAC operating mode, see table below for valid combinations
Configure CODEC Serial Port to master mode.
Configure Serial Audio Interface Port to master mode.
Identify external ADC clock source as SAI Serial Port.
DAC Mode
Not One Line Mode
CX_SCLK=64 Fs
CX_LRCK=SSM/DSM/QSM
SAI_SCLK=64 Fs
SAI_LRCK=CX_LRCK
CX_SCLK=128 Fs
CX_LRCK=SSM/DSM
SAI_SCLK=64 Fs
SAI_LRCK=CX_LRCK
CX_SCLK=256 Fs
CX_LRCK=SSM
SAI_SCLK=64 Fs
SAI_LRCK=CX_LRCK
One Line Mode #1
CX_SCLK=128 Fs
CX_LRCK=SSM/DSM
SAI_SCLK=64 Fs
SAI_LRCK=CX_LRCK
CX_SCLK=128 Fs
CX_LRCK=SSM/DSM
SAI_SCLK=64 Fs
SAI_LRCK=CX_LRCK
not valid
One Line Mode #2
not valid
ADC Mode
Not One
Line Mode
One Line
Mode #1
not valid
One Line
Mode #2
CX_SCLK=256 Fs
CX_LRCK=SSM
SAI_SCLK=64 Fs
SAI_LRCK=CX_LRCK
SCLK_PORT1
LRCK_PORT1
SDIN_PORT1
SCLK_PORT2
LRCK_PORT2
SDIN_PORT2
SCLK_PORT3
LRCK_PORT3
SDOUT1_PORT3
SDOUT2_PORT3
SDOUT3_PORT3
SAI_SCLK
SAI_LRCK
SAI_SDOUT
CX_SCLK
CX_LRCK
CX_SDOUT
CX_SDIN1
CX_SDIN2
CX_SDIN3
RMCK
ADCIN1
ADCIN2
MCLK
SDOUT1
SDOUT2
LRCK
SCLK
64Fs
SPDIF Data
ADC Data
64Fs,128Fs, 256Fs
DIGITAL AUDIO
PROCESSOR
CS5361
CS5361
MCLK
Figure 16. OLM Configuration #1
CS42526
相關(guān)PDF資料
PDF描述
CDB4270 24-Bit, 192 kHz Stereo Audio CODEC
CDB4271 24-Bit, 192 kHz Stereo Audio CODEC
CDB4272 24-Bit, 192 kHz Stereo Audio CODEC
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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CDB4271 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd CS4271 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4272 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd CS4272 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4299 功能描述:音頻 IC 開(kāi)發(fā)工具 Eval Bd AC’97 CODEC w/SRC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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