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參數(shù)資料
| 型號： | CDB42528 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver |
| 中文描述： | 114分貝192千赫6通道編解碼器與S / PDIF接收器 |
| 文件頁數(shù)： | 23/90頁 |
| 文件大小： | 1560K |
| 代理商： | CDB42528 |
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DS585PP5
23
CS42526
4.3.3
Each DAC’s output level is controlled via the Volume Control registers operating over the range of 0 to
-127 dB attenuation with 0.5 dB resolution. See “Volume Control (addresses 0Fh, 10h, 11h, 12h, 13h,
14h)” on page 58. Volume control changes are programmable to ramp in increments of 0.125 dB at the
rate controlled by the SZC[1:0] bits in the Digital Volume Control register. See “Volume Transition Control
(address 0Dh)” on page 56.
Each output can be independently muted via mute control bits in the register “Channel Mute (address
0Eh)” on page 58. When enabled, each XX_MUTE bit attenuates the corresponding DAC to its maximum
value (-127 dB). When the XX_MUTE bit is disabled, the corresponding DAC returns to the attenuation
level set in the Volume Control register. The attenuation is ramped up and down at the rate specified by
the SZC[1:0] bits.
The Mute Control pin, MUTEC, is typically connected to an external mute control circuit. The Mute Control
pin outputs high impedance during power up or in power down mode by setting the PDN bit in the register
“Power Control (address 02h)” on page 47 to a ‘1’. Once out of power-down mode the pin can be con-
trolled by the user via the control port, or automatically asserted high when zero data is present on all DAC
inputs, or when serial port clock errors are present. To prevent large transients on the output, it is desirable
to mute the DAC outputs before the Mute Control pin is asserted. Please see the MUTEC pin in the Pin
Descriptions section for more information.
Each of the RXP1/GPO1-RXP7/GPO7 can be programmed to provide a hardware MUTE signal to indi-
vidual circuits. When not used as an S/PDIF input, each pin can be programmed as an output, with spe-
cific muting capabilities as defined by the function bits in the register “RXP/General Purpose Pin Control
(addresses 29h to 2Fh)” on page 69.
Digital Volume and Mute Control
4.3.4
The CS42526 implements the channel mixing functions of the ATAPI CD-ROM specification. The
ATAPI functions are applied per A-B pair. Refer to Table 16 on page 60 and Figure 8 for additional infor-
mation.
ATAPI Specification
Σ
Σ
A Channel
Volume
Control
AOUTAx
AOUTBx
Left Channel
Audio Data
Right Channel
Audio Data
B Channel
Volume
Control
MUTE
MUTE
CX_SDINx
Figure 8. ATAPI Block Diagram (x = channel pair 1, 2, or 3)
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