參數(shù)資料
型號: CDB42528
廠商: Cirrus Logic, Inc.
元件分類: Codec
英文描述: 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
中文描述: 114分貝192千赫6通道編解碼器與S / PDIF接收器
文件頁數(shù): 20/90頁
文件大小: 1560K
代理商: CDB42528
CS42526
20
DS585PP5
3. TYPICAL CONNECTION DIAGRAM
VD
AOUTA1+
24
0.1 μF
+
10 μF
100 μF
0.1 μF
+
+
17
18
VQ
FILT+
36
37
0.1 μF
4.7 μF
VA
+
10 μF
51
AOUTA1-
AOUTB1+
35
34
AOUTB1-
AOUTA2+
32
33
AOUTA2-
AOUTB2+
31
30
AOUTB2-
AOUTA3+
28
29
AOUTA3-
AOUTB3+
27
26
AOUTB3-
M UTEC
38
25
DGND
DGND
5
REFGND
19
41
4
VA
VD
0.1 μF
AGND
40
AGND
52
LPFLT
39
AINL+
AINL-
AINR+
AINR-
15
16
14
13
Connect DGND and AG ND at single point near Codec
0.01 μF
0.1 μF
+
10 μF
+5 V
0.01 μF
0.01 μF
+3.3 V to +5 V
+
10 μF
0.1 μF
0.01 μF
VLS
0.1 μF
+2.5 V
to +5 V
53
VLC
0.1 μF
+1.8 V
to +5 V
6
3
60
59
1
64
61
2
63
8
7
SCL/CCLK
SDA/CDOUT
AD1/CDIN
RST
12
9
OM CK
CX_SDIN1
SAI_LRCK
SAI_SCLK
CX_SDIN3
CX_SDIN2
CX_LRCK
CX_SCLK
AD0/CS
10
INT
11
Digital Audio
Processor
M icro-
Controller
55
RM CK
58
ADCIN1
57
ADCIN2
CS5361
A/D Converter
CS5361
A/D Converter
56
CX_SDOUT
54
SAI_SDOUT
48
46
49
44
45
47
RXP0
RXP1/GPO1
S/PDIF
Interface
50
TXP
Driver
Up to 8
Sources
43
RXP2/GPO2
RXP3/GPO3
RXP4/GPO4
RXP5/GPO5
RXP6/GPO6
RXP7/GPO7
42
OSC
Analog Output Buffer
2
and
M ute Circuit (optional)
M ute
Drive
(optional)
2700 pF*
Buffer
1
2700 pF*
Input
Buffer
1
Left Analog Input
Right Analog Input
Analog
Analog
+VA
*
* Pull up or down as
required on startup if the
M ute Control is used.
*
Analog Output Buffer
2
and
M ute Circuit (optional)
Analog Output Buffer
2
and
M ute Circuit (optional)
Analog Output Buffer
2
and
M ute Circuit (optional)
Analog Output Buffer
2
and
M ute Circuit (optional)
Analog Output Buffer
2
and
M ute Circuit (optional)
2 k
2 k
**
**
CFILT
3
RFILT
3
CRIP
3
** Resistors are required for
I
2
C control port operation
1. See the ADC Input Filter section in the Appendix.
2. See the DAC Output Filter section in the Appendix.
3. See the PLL Filter section in the Appendix.
62
TEST
Figure 5. Typical Connection Diagram
CS42526
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