參數(shù)資料
型號(hào)： CDB42518
廠商： Cirrus Logic, Inc.
元件分類： Codec
英文描述： 110 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
中文描述： 110分貝192千赫6通道編解碼器與S / PDIF接收器
文件頁(yè)數(shù)： 53/90頁(yè)
文件大?。?/td> 1559K
代理商： CDB42518
DS583PP5
53
CS42516
6.7.2
OMCK FREQUENCY (OMCK FREQX)
Default = 00
Function:
Sets the appropriate frequency for the supplied OMCK.
6.7.3
PLL LOCK TO LRCK (PLL_LRCK)
Default = 0
0 - Disabled
1 - Enabled
Function:
When enabled, the internal PLL of the CS42516 will lock to the SAI_LRCK of the SAI serial port.
6.7.4
MASTER CLOCK SOURCE SELECT (SW_CTRLX)
Default = 00
Function:
These two bits, along with the UNLOCK bit in register “Interrupt Status (address 20h) (Read Only)”
on page 63, determine the master clock source for the CS42516. When SW_CTRL1 and SW_CTRL0
are set to '00'b, selecting the output of the PLL as the internal clock source, and the PLL becomes
unlocked, then RMCK will equal OMCK, but all internal and serial port timings are not valid.
When the FRC_PLL_LK bit is set to ‘1’b, the SW_CTRLX bits must be set to ‘00’b. If the PLL becomes
unlocked when the FRC_PLL_LK bit is set to ‘1’b, then RMCK will not equal OMCK.
6.7.5
FORCE PLL LOCK (FRC_PLL_LK)
Default = 0
Function:
This bit is used to enable the PLL to lock to the S/PDIF input stream or the SAI_LRCK with the ab-
sence of a clock signal on OMCK.When set to a ‘1’b, the auto-detect sample frequency feature will
be disabled and the SW_CTRLX bits must be set to ‘00’b. The OMCK/PLL_CLK Ratio (address 07h)
(Read Only) register contents are not valid and the PLL_CLK[2:0] bits will be set to ‘111’b. Use the
DE-EMPH[1:0] bits to properly apply de-emphasis filtering.
OMCK Freq1 OMCK Freq0 Description
0
0
1
1
0
1
0
1
11.2896 MHz or 12.2880 MHz
16.9344 MHz or 18.4320 MHz
22.5792 MHz or 24.5760 MHz
Reserved
Table 11. OMCK Frequency Settings
SW_CTRL1 SW_CTRL0
0
0
1
UNLOCK
X
X
0
1
0
1
Description
0
1
0
Manual setting, MCLK sourced from PLL.
Manual setting, MCLK sourced from OMCK.
Hold, keep same MCLK source.
Auto switch, MCLK sourced from OMCK.
Auto switch, MCLK sourced from PLL.
Auto switch, MCLK sourced from OMCK.
1
1
Table 12. Master Clock Source Select
相關(guān)PDF資料
PDF描述
CDB42528 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
CDB4270 24-Bit, 192 kHz Stereo Audio CODEC
CDB4271 24-Bit, 192 kHz Stereo Audio CODEC
CDB4272 24-Bit, 192 kHz Stereo Audio CODEC
CDB42L51 Silver Mica Capacitor; Capacitance:120pF; Capacitance Tolerance:+/- 5%; Series:CDV16; Voltage Rating:1000VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.94mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB42528 功能描述:音頻 IC 開發(fā)工具 Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4265 功能描述:音頻 IC 開發(fā)工具 Eval Bd 192kHz CODEC w/PGA & Input Mux RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4270 功能描述:音頻 IC 開發(fā)工具 Eval Bd 105dB 192kHz CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4271 功能描述:音頻 IC 開發(fā)工具 Eval Bd CS4271 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4272 功能描述:音頻 IC 開發(fā)工具 Eval Bd CS4272 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*