參數(shù)資料
型號： CDB42518
廠商： Cirrus Logic, Inc.
元件分類： Codec
英文描述： 110 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
中文描述： 110分貝192千赫6通道編解碼器與S / PDIF接收器
文件頁數(shù)： 36/90頁
文件大小： 1559K
代理商： CDB42518
CS42516
36
DS583PP5
4.6.4d
This configuration will support up to 6 channels of DAC data, 6 channels of ADC data and no channels of
S/PDIF received data. OLM Config #4 will handle up to 20-bit ADC samples at an Fs of 48 kHz and 24-bit
DAC samples at an Fs of 48 kHz. Since the ADCs data stream is configured to use the SAI_SDOUT out-
put and the internal and external ADCs are clocked from the SAI_SP, then the sample rate for the CODEC
Serial Port can be different from the sample rate of the Serial Audio Interface serial port.
OLM Config #4
Register / Bit Settings
Description
Functional Mode Register (addr = 03h)
Set CODEC_FMx = 00,01,10
Set SAI_FMx = 00,01,10
CX_LRCK can run at SSM, DSM, or QSM independent of SAI_LRCK
SAI_LRCK can run at SSM, DSM, or QSM independent of CX_LRCK
Configure ADC data to use SAI_SDOUT and SAI_SP Clocks. S/PDIF data
is not supported in this configuration
Set ADC_SP SELx = 10
Interface Format Register (addr = 04h)
Set DIFx bits to proper serial format
Set ADC_OLx bits = 00,01
Set DAC_OLx bits = 00,01,10
Misc. Control Register (addr = 05h)
Set CODEC_SP M/S = 1
Set SAI_SP M/S = 0 or 1
Set EXT ADC SCLK = 0
Select the digital interface format when not in one line mode
Select ADC operating mode, see table below for valid combinations
Select DAC operating mode, see table below for valid combinations
Set DAC Serial Port to master mode.
Set ADC Serial Port to master mode or slave mode.
Identify external ADC clock source as SAI Serial Port.
CX_SDOUT= not used
SAI_SDOUT=ADC Data
DAC Mode
Not One Line Mode
CX_SCLK=64 Fs
CX_LRCK=SSM/DSM/QSM
SAI_SCLK=64 Fs
SAI_LRCK=SSM/DSM/QSM
CX_SCLK=64 Fs
CX_LRCK=SSM/DSM/QSM
SAI_SCLK=128 Fs
SAI_LRCK=SSM
not valid
One Line Mode #1
CX_SCLK=128 Fs
CX_LRCK=SSM/DSM
SAI_SCLK=64 Fs
SAI_LRCK=SSM/DSM/QSM
CX_SCLK=128 Fs
CX_LRCK=SSM/DSM
SAI_SCLK=128 Fs
SAI_LRCK=SSM
not valid
One Line Mode #2
CX_SCLK=256 Fs
CX_LRCK=SSM
SAI_SCLK=64 Fs
SAI_LRCK=SSM/DSM/QSM
CX_SCLK=256 Fs
CX_LRCK=SSM
SAI_SCLK=128 Fs
SAI_LRCK=SSM
not valid
ADC Mode
Not One
Line Mode
One Line
Mode #1
One Line
Mode #2
SCLK_PORT1
LRCK_PORT1
SDIN_PORT1
SCLK_PORT2
LRCK_PORT2
SDIN_PORT2
SCLK_PORT3
LRCK_PORT3
SDOUT1_PORT3
SDOUT2_PORT3
SDOUT3_PORT3
RMCK
ADCIN1
ADCIN2
MCLK
SDOUT1
SDOUT2
LRCK
SCLK
64Fs,128Fs,256Fs
ADC Data
64Fs,128Fs
DIGITAL AUDIO
PROCESSOR
CS5361
CS5361
SAI_SCLK
SAI_LRCK
SAI_SDOUT
CX_SCLK
CX_LRCK
CX_SDOUT
CX_SDIN1
CX_SDIN2
CX_SDIN3
MCLK
Figure 19. OLM Configuration #4
CS42516
相關PDF資料
PDF描述
CDB42528 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
CDB4270 24-Bit, 192 kHz Stereo Audio CODEC
CDB4271 24-Bit, 192 kHz Stereo Audio CODEC
CDB4272 24-Bit, 192 kHz Stereo Audio CODEC
CDB42L51 Silver Mica Capacitor; Capacitance:120pF; Capacitance Tolerance:+/- 5%; Series:CDV16; Voltage Rating:1000VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.94mm; Leaded Process Compatible:Yes RoHS Compliant: Yes
相關代理商/技術參數(shù)
參數(shù)描述
CDB42528 功能描述:音頻 IC 開發(fā)工具 Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4265 功能描述:音頻 IC 開發(fā)工具 Eval Bd 192kHz CODEC w/PGA & Input Mux RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4270 功能描述:音頻 IC 開發(fā)工具 Eval Bd 105dB 192kHz CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4271 功能描述:音頻 IC 開發(fā)工具 Eval Bd CS4271 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4272 功能描述:音頻 IC 開發(fā)工具 Eval Bd CS4272 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*