參數(shù)資料
型號(hào)： CDB4245
廠商： Cirrus Logic, Inc.
元件分類： Codec
英文描述： 105 dB, 24-Bit, 192 kHz Streo Sudio CODEC
中文描述： 105分貝24位192千赫Streo蘇迪奧編解碼器
文件頁數(shù)： 46/54頁
文件大?。?/td> 1166K
代理商： CDB4245
CS4245
46
6.12 DAC Control 2 - Address 0Ch
6.12.1 DAC Soft Ramp or Zero Cross Enable (Bits 7:6)
Function:
Soft Ramp Enable
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally
ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock
periods. See Table 17 on page 46.
Zero Cross Enable
Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will
occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur
after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample
rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
itored and implemented for each channel. See Table 17 on page 46.
Soft Ramp and Zero Cross Enable
Soft Ramp and Zero Cross Enable dictate that signal level changes, either by attenuation changes or
muting, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level
change will occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms
at 48 kHz sample rate) if the signal does not encounter a zero crossing. The zero cross function is
independently monitored and implemented for each channel. See Table 17 on page 46.
6.12.2 Invert DAC Output (Bit 5)
Function:
When this bit is set, the output of the DAC will be inverted.
6.12.3 Active High/Low (Bit 0)
Function:
When this bit is set, the INT pin will function as an active high CMOS driver.
When this bit is cleared, the INT pin will function as an active low open drain driver and will require an
external pull-up resistor for proper operation.
6.13 Interrupt Status - Address 0Dh
For all bits in this register, a ‘1’ means the associated interrupt condition has occurred at least once
since the register was last read. A ‘0’ means the associated interrupt condition has NOT occurred
7
6
5
4
3
2
1
0
DACSoft
DACZero
InvertDAC
Reserved
Reserved
Reserved
Reserved
Active_H/L
Table 17. DAC Soft Cross or Zero Cross Mode Selection
DACSoft
0
0
1
1
DACZeroCross
0
1
0
1
Mode
Changes to affect immediately
Zero Cross enabled
Soft Ramp enabled
Soft Ramp and Zero Cross enabled (default)
7
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
Reserved
ADCClkErr
DACClkErr
ADCOvfl
ADCUndrfl
相關(guān)PDF資料
PDF描述
CDB42518 110 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
CDB42528 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver
CDB4270 24-Bit, 192 kHz Stereo Audio CODEC
CDB4271 24-Bit, 192 kHz Stereo Audio CODEC
CDB4272 24-Bit, 192 kHz Stereo Audio CODEC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB42518 功能描述:音頻 IC 開發(fā)工具 Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB42528 功能描述:音頻 IC 開發(fā)工具 Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4265 功能描述:音頻 IC 開發(fā)工具 Eval Bd 192kHz CODEC w/PGA & Input Mux RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4270 功能描述:音頻 IC 開發(fā)工具 Eval Bd 105dB 192kHz CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
CDB4271 功能描述:音頻 IC 開發(fā)工具 Eval Bd CS4271 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V
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