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參數(shù)資料
| 型號： | CDB42448 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 108 dB, 192 kHz 6-in, 8-out CODEC |
| 中文描述： | 108分貝192千赫6 - 8 -出編解碼器 |
| 文件頁數(shù)： | 54/70頁 |
| 文件大小： | 1146K |
| 代理商： | CDB42448 |
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54
DS648PP2
Function:
When enabled, these bits will invert the signal polarity of their respective channels.
6.13
STATUS CONTROL (ADDRESS 18H)
6.13.1 INTERRUPT PIN CONTROL (INT[1:0])
Default = 00
00 - Active high; high output indicates interrupt condition has occurred
01 - Active low, low output indicates an interrupt condition has occurred
10 - Open drain, active low. Requires an external pull-up resistor on the INT pin.
11 - Reserved
Function:
Determines how the Interrupt pin (INT) will indicate an interrupt condition.
For DAC and ADC clock errors, the INT pin is set to “Level Active Mode” and will become active
during
the clock error. For the ADCx_OVFL error, the INT pin is set to Level Active Mode and will become
active
during
the overflow error.
6.14
STATUS (ADDRESS 19H) (READ ONLY)
For all bits in this register, a “1” means the associated error condition has occurred at least once since the register
was last read. A”0” means the associated error condition has NOT occurred since the last reading of the register.
Reading the register resets all bits to 0. Status bits that are masked off in the associated mask register will always
be “0” in this register.
6.14.1 DAC CLOCK ERROR (DAC_CLK ERROR)
Default = x
Function:
Indicates an invalid MCLK to DAC_LRCK ratio. This status flag is set to “Level Active Mode” and be-
comes active
during
the error condition. See “System Clocking” on page 32 for valid clock ratios.
6.14.2 ADC CLOCK ERROR (ADC_CLK ERROR)
Default = x
Function:
Indicates an invalid MCLK to ADC_LRCK ratio. This status flag is set to “Level Active Mode” and be-
comes active
during
the error condition. See “System Clocking” on page 32 for valid clock ratios.
7
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
Reserved
INT1
INT0
Reserved
Reserved
7
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
DAC_CLK Error ADC_CLK Error
ADC3_OVFL
ADC2_OVFL
ADC1_OVFL
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PDF描述 |
|---|---|
| CDB4245 | 105 dB, 24-Bit, 192 kHz Streo Sudio CODEC |
| CDB42518 | 110 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver |
| CDB42528 | 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver |
| CDB4270 | 24-Bit, 192 kHz Stereo Audio CODEC |
| CDB4271 | 24-Bit, 192 kHz Stereo Audio CODEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB4245 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 192kHz CODEC w/PGA & Input Mux RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42518 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42528 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4265 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 192kHz CODEC w/PGA & Input Mux RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4270 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 105dB 192kHz CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
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