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參數(shù)資料
| 型號： | CDB42428 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 114 dB, 192kHz 8-Ch CODEC WITH PLL |
| 中文描述： | 114分貝，192kHz的8通道編解碼器與鎖相環(huán) |
| 文件頁數(shù)： | 33/67頁 |
| 文件大?。?/td> | 1433K |
| 代理商： | CDB42428 |
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33
CS42428
5.3
Power Control (address 02h)
5.3.1
POWER DOWN PLL (PDN_PLL)
Default = 0
Function:
When enabled, the PLL will remain in a reset state. It is advised that any change of this bit be made
while the DACs are muted or the power down bit (PDN) is enabled to eliminate the possibility of audi-
ble artifacts.
5.3.2
POWER DOWN ADC (PDN_ADC)
Default = 0
Function:
When enabled the stereo analog to digital converter will remain in a reset state. It is advised that any
change of this bit be made while the DACs are muted or the power down bit (PDN) is enabled to elim-
inate the possibility of audible artifacts.
5.3.3
POWER DOWN DAC PAIRS (PDN_DACX)
Default = 0
Function:
When enabled the respective DAC channel pair x (AOUTAx and AOUTBx) will remain in a reset state.
5.3.4
POWER DOWN (PDN)
Default = 1
Function:
The entire device will enter a low-power state when this function is enabled, and the contents of the
control registers are retained in this mode. The power down bit defaults to ‘enabled’ on power-up and
must be disabled before normal operation can occur.
5.4
Functional Mode (address 03h)
5.4.1
DAC FUNCTIONAL MODE (DAC_FMX)
Default = 00
00 - Single-Speed Mode (4 to 50 kHz sample rates)
01 - Double-Speed Mode (50 to 100 kHz sample rates)
10 - Quad-Speed Mode (100 to 192 kHz sample rates)
11 - Reserved
Function:
Selects the required range of sample rates for all converters clocked from the DAC serial port (DAC_SP).
Bits must be set to the corresponding sample rate range when the DAC_SP is in Master or Slave mode.
7
6
5
4
3
2
1
0
Reserved
PDN_PLL
PDN_ADC
PDN_DAC4
PDN_DAC3
PDN_DAC2
PDN_DAC1
PDN
7
6
5
4
3
2
1
0
DAC_FM1
DAC_FM0
ADC_FM1
ADC_FM0
Reserved
ADC_SP SEL
DAC_DEM
Reserved
相關PDF資料 |
PDF描述 |
|---|---|
| CDB42438 | 108 dB, 192 kHz 4-in, 6-out TDM CODEC |
| CDB42448 | 108 dB, 192 kHz 6-in, 8-out CODEC |
| CDB4245 | 105 dB, 24-Bit, 192 kHz Streo Sudio CODEC |
| CDB42518 | 110 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver |
| CDB42528 | 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CDB42438 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 108dB 6&8-Ch Mult-Ch CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4244 | 制造商:Cirrus Logic 功能描述:EVAL BD 4 INPUT/ 4 OUTPUT CODEC - Boxed Product (Development Kits) 制造商:Cirrus Logic 功能描述:Eval Board |
| CDB42448 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 108dB 8-Ch Mult-Ch CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4245 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 192kHz CODEC w/PGA & Input Mux RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42518 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評估:TAS5614L 工作電源電壓:12 V to 38 V |
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