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參數(shù)資料
| 型號(hào)： | CDB42418 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 110 dB, 192kHz 8-Ch CODEC WITH PLL |
| 中文描述： | 110分貝，192kHz的8通道編解碼器與鎖相環(huán) |
| 文件頁(yè)數(shù)： | 34/67頁(yè) |
| 文件大?。?/td> | 1433K |
| 代理商： | CDB42418 |
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CS42418
34
5.4.2
ADC FUNCTIONAL MODE (ADC_FMX)
Default = 00
00 - Single-Speed Mode (4 to 50 kHz sample rates)
01 - Double-Speed Mode (50 to 100 kHz sample rates)
10 - Quad-Speed Mode (100 to 192 kHz sample rates)
11 - Reserved
Function:
Selects the required range of sample rates for the ADC serial port(ADC_SP). These bits must be set
to the corresponding sample rate range when the ADC_SP is in Master or Slave mode.
5.4.3
ADC CLOCK SOURCE SELECT (ADC_CLK SEL)
Default = 0
0 - ADC_SDOUT clocked from the DAC_SP.
1 - ADC_SDOUT clocked from the ADC_SP.
Function:
Selects the desired clocks for the ADC serial output.
5.4.4
DAC DE-EMPHASIS CONTROL (DAC_DEM)
Default = 0
Function:
Enables the digital filter to maintain the standard 15
μ
s/50
μ
s digital de-emphasis filter response at
the auto-detected sample rate of either 32, 44.1, or 48 kHz. De-emphasis will not be enabled, regard-
less of this register setting, at any other sample rate. If the FRC_PLL_LK bit is set to a ‘1’b, then the
auto-detect sample rate feature is disabled. To apply the correct de-emphasis filter, use the DE-
EMPH bits in the Interrupt Control (address 1Eh) register to set the appropriate sample rate.
5.5
Interface Formats (address 04h)
5.5.1
DIGITAL INTERFACE FORMAT (DIFX)
Default = 01
Function:
These bits select the digital interface format used for the ADC & DAC Serial Port when not in one_line
mode. The required relationship between the Left/Right clock, serial clock and serial data is defined by
the Digital Interface Format and the options are detailed in Figures 7 - 9.
DAC_DEM
reg03h[1]
0
1
1
FRC_PLL_LK
reg06h[0]
X
0
1
DE-EMPH[1:0]
reg1Eh[5:4]
XX
XX
00
01
10
11
De-Emphasis
Mode
No De-Emphasis
Auto-Detect Fs
Reserved
32 kHz
44.1 kHz
48 kHz
Table 6. DAC De-Emphasis
7
6
5
4
3
2
1
0
DIF1
DIF0
ADC_OL1
ADC_OL0
DAC_OL1
DAC_OL0
Reserved
CODEC_RJ16
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDB42426 | 114 dB, 192kHz 6-Ch CODEC WITH PLL |
| CDB42428 | 114 dB, 192kHz 8-Ch CODEC WITH PLL |
| CDB42438 | 108 dB, 192 kHz 4-in, 6-out TDM CODEC |
| CDB42448 | 108 dB, 192 kHz 6-in, 8-out CODEC |
| CDB4245 | 105 dB, 24-Bit, 192 kHz Streo Sudio CODEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB42426 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:114 dB, 192kHz 6-Ch CODEC WITH PLL |
| CDB42428 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd CBD42418/28 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB42438 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 108dB 6&8-Ch Mult-Ch CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V |
| CDB4244 | 制造商:Cirrus Logic 功能描述:EVAL BD 4 INPUT/ 4 OUTPUT CODEC - Boxed Product (Development Kits) 制造商:Cirrus Logic 功能描述:Eval Board |
| CDB42448 | 功能描述:音頻 IC 開發(fā)工具 Eval Bd 108dB 8-Ch Mult-Ch CODEC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V |
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