參數(shù)資料
型號: CDB4228A
廠商: Cirrus Logic, Inc.
元件分類: Codec
英文描述: 24-Bit, 96 kHz Surround Sound Codec
中文描述: 24位96千赫環(huán)繞聲解碼器
文件頁數(shù): 8/32頁
文件大?。?/td> 518K
代理商: CDB4228A
CS4228A
8
DS511PP1
SWITCHING CHARACTERISTICS - CONTROL PORT
(TA = 25° C, VA = VD = +5 V,
VL =2.375 to 5.25 V; Inputs: logic 0 = DGND, logic 1 = VL, C
L
= 30 pF)
Notes: 10.
Data must be held for sufficient time to bridge the transition time of CCLK.
For F
SCK
< 1 MHz
11.
Parameter
Symbol
Min
Max
Units
SPI Mode
(SDOUT > 47 k
to GND)
CCLK Clock Frequency
f
sck
t
csh
t
css
t
scl
t
sch
t
dsu
t
dh
t
r2
t
f2
-
6
MHz
μ
s
ns
CS High Time Between Transmissions
1.0
CS Falling to CCLK Edge
20
CCLK Low Time
66
ns
CCLK High Time
66
ns
CDIN to CCLK Rising Setup Time
40
ns
CCLK Rising to DATA Hold Time
(Note 10)
15
ns
Rise Time of CCLK and CDIN
(Note 11)
100
ns
Fall Time of CCLK and CDIN
(Note 11)
100
ns
t
r2
t
f2
tdsu
t
dh
t
sch
tscl
CS
CCLK
CDIN
tcss
tcsh
Figure 3. SPI Control Port Timing
相關(guān)PDF資料
PDF描述
CDB4228 24-Bit, 96 kHz Surround Sound Codec
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CDB42428 114 dB, 192kHz 8-Ch CODEC WITH PLL
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