參數(shù)資料
型號(hào): CDB4228A
廠商: Cirrus Logic, Inc.
元件分類(lèi): Codec
英文描述: 24-Bit, 96 kHz Surround Sound Codec
中文描述: 24位96千赫環(huán)繞聲解碼器
文件頁(yè)數(shù): 7/32頁(yè)
文件大小: 518K
代理商: CDB4228A
CS4228A
DS511PP1
7
SWITCHING CHARACTERISTICS
(Continued)
Notes: 9.
After powering up the CS4228A, RST should be held low until the power supplies and clocks are settled.
Parameter
Symbol
Min
1
Typ
-
Max
-
Units
ms
RST Low Time
(Note 9)
SCLK Falling Edge to SDOUT Output Valid
(DSCK=0)
t
dpd
t
lrpd
t
ds
t
dh
-
50
ns
LRCK Edge to MSB Valid
-
20
ns
SDIN Setup Time Before SCLK Rising Edge
-
10
ns
SDIN Hold Time After SCLK Rising Edge
Master Mode
-
30
ns
SCLK Falling to LRCK Edge
t
mslr
+10
-
ns
SCLK Duty Cycle
Slave Mode
50
-
%
SCLK Period
t
sckw
t
sckh
t
sckl
t
lrckd
t
lrcks
-
-
ns
SCLK High Time
50
-
-
ns
SCLK Low Time
50
-
-
ns
SCLK rising to LRCK Edge
(DSCK=0)
25
-
-
ns
LRCK Edge to SCLK Rising
(DSCK=0)
25
-
-
ns
Figure 1. Serial Audio Port Master Mode Timing
t
mslr
SCLK*
(output)
LRCK
(output)
SDOUT
sckh
sckl
sckw
t
t
t
MSB
MSB-1
*SCLK shown for DSCK = 0.
SCLK inverted for DSCK = 1.
t
dpd
SDOUT
LRCK
(input)
SCLK*
(input)
SDIN1
SDIN2
SDIN3
dh
t
ds
t
lrpd
t
lrcks
t
lrckd
t
Figure 2. Serial Audio Port Slave Mode Timing
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CDB4228 24-Bit, 96 kHz Surround Sound Codec
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