參數(shù)資料
型號(hào): CDB4228A
廠商: Cirrus Logic, Inc.
元件分類: Codec
英文描述: 24-Bit, 96 kHz Surround Sound Codec
中文描述: 24位96千赫環(huán)繞聲解碼器
文件頁(yè)數(shù): 15/32頁(yè)
文件大?。?/td> 518K
代理商: CDB4228A
CS4228A
DS511PP1
15
SDIN1, SDIN2, and SDIN3 are the data input pins.
SDOUT, the data output pin, carries data from the
two 24-bit ADC’s. The serial audio port may also
be operated in One Line Data Mode in which all 6
channels of DAC data is input on SDIN1 and the
stereo ADC data is output on SDOUT. Table 1 out-
lines the serial port input to DAC channel alloca-
tions.
3.6.2 Serial Audio Interface Formats
The digital audio port supports 6 formats, shown in
Figures 9, 10, 11 and 12. These formats are selected
using the DDF2:0 bits in the Serial Port Mode reg-
ister.
In One Line Data Mode, all 6 DAC channels are in-
put on SDIN1. One Line Data Mode is only avail-
able in BRM. See Figure 12 for channel
allocations.
DAC Inputs
SDIN1
left channel
right channel
single line
left channel
right channel
left channel
right channel
DAC #1
DAC #2
All 6 DAC channels (BRM)
DAC #3
DAC #4
DAC #5
DAC #6
SDIN2
SDIN3
Table 1. Serial Audio Port Input Channel Allocations
Figure 9. I
2
S Serial Audio Formats
I2S Mode, Data Valid on Rising Edge of SCLK
Bits/Sample
SCLK Rate(s)
16
32, 48, 64, 128 Fs
32, 64 Fs
18 to 24
48, 64, 128 Fs
64 Fs
Notes
BRM, 48 Fs available in slave mode only
HRM
BRM, 48 Fs available in slave mode only
HRM
LRCK
SCLK
Left Channel
Right Channel
SDIN1/2/3
SDOUT
+3 +2 +1
LSB
+5 +4
MSB
-1 -2 -3 -4 -5
+3 +2 +1
LSB
+5 +4
MSB
-1 -2 -3 -4
相關(guān)PDF資料
PDF描述
CDB4228 24-Bit, 96 kHz Surround Sound Codec
CDB42416 110 dB, 192kHz 6-Ch CODEC WITH PLL
CDB42418 110 dB, 192kHz 8-Ch CODEC WITH PLL
CDB42426 114 dB, 192kHz 6-Ch CODEC WITH PLL
CDB42428 114 dB, 192kHz 8-Ch CODEC WITH PLL
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