參數(shù)資料
型號(hào): CDB4226
廠商: Cirrus Logic, Inc.
元件分類: Codec
英文描述: Surround Sound Codec
中文描述: 環(huán)繞聲編解碼器
文件頁(yè)數(shù): 25/60頁(yè)
文件大?。?/td> 1619K
代理商: CDB4226
CS4226
DS188F1
25
DSP Port Mode Byte (0Eh)
DDF2-DDF0
Data format
0 - Right justified, 20-bit
1 - Right justified, 18-bit
2 - Right justified, 16-bit
3 - Left justified, 20-bit in / 24-bit out
4 - I
2
S compatible, 20-bit in / 24-bit out
5 - One Data Line Mode (Fig. 6)
6 - One Data Line (Master Mode only, Fig. 6)
7 - Not used
DSCK
Set the polarity of clocking data
0 - Data clocked in on rising edge of SCLK, out on falling edge of SCLK
1 - Data clocked in on falling edge of SCLK, out on rising edge of SCLK
DMS1-DMS0
Sets the mode of the port
0 - Slave
1 - Master Burst - SCLKs are gated 128 fs clocks
2 - Master Non-Burst - SCLKs are evenly distributed (No 48 fs SCLK)
3 - not used - default to Slave
DCK1-DCK0 *
Set number of bit clocks per Fs period
0 - 128
1 - 48 - Master Burst or Slave mode only
2 - 32 - All formats will default to 16 bits
3 - 64
This register defaults to 00h.
* DCK1-DCK0 are ignored in formats 5 and 6.
B7
B6
B5
B4
B3
B2
B1
B0
DCK1
DCK0
DMS1
DMS0
DSCK
DDF2
DDF1
DDF0
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