參數(shù)資料
型號: CDB4226
廠商: Cirrus Logic, Inc.
元件分類: Codec
英文描述: Surround Sound Codec
中文描述: 環(huán)繞聲編解碼器
文件頁數(shù): 24/60頁
文件大小: 1619K
代理商: CDB4226
CS4226
24
DS188F1
Input Control Byte (0Ch)
OVRM
ADC Overflow Mask
0- Error condition is masked at OLV/ERR pin and no DAC muting on extended hold
1- No Masking
VM
Validity Error Mask
0- Error condition is masked at OLV/ERR pin and no DAC muting on extended hold
1- No Masking
BM
Biphase Error Mask
0- Error condition is masked at OLV/ERR pin and no DAC muting on extended hold
1- No Masking
PM
Parity Error Mask
0- Error condition is masked at OLV/ERR pin and no DAC muting on extended hold
1- No Masking
GNL1-GNL0
Sets left input gain
0 - 0 dB
1 - 3 dB
2 - 6 dB
3 - 9 dB
GNR1-GNR0
Sets right input gain
0 - 0 dB
1 - 3 dB
2 - 6 dB
3 - 9 dB
This register defaults to 00h.
ADC Status Report Byte (Read Only) (0Dh)
LVL2-LVL0, LVR2-0Left and Right ADC output level
0 - Normal output levels
1 - -6 dB level
2 - -5 dB level
3 - -4 dB level
4 - -3 dB level
5 - -2 dB level
6 - -1 dB level
7 - Clipping
LVLM1-LVLM0
Mono ADC output level
0 - Normal output level
1 - -6 dB level
2 - -3 dB level
3 - Clipping
These bits are ’sticky’. They constantly monitor the ADC output for the peak levels and hold the maximum output.
They are reset to 0 when read.
This register is read only.
B7
B6
VM
B5
BM
B4
PM
B3
B2
B1
B0
OVRM
GNR1
GNR0
GNL1
GNL0
B7
LVM1
B6
B5
LVR2
B4
LVR1
B3
LVR0
B2
LVL2
B1
LVL2
B0
LVL0
LVM0
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