參數(shù)資料
型號(hào): CDB4225
廠商: Cirrus Logic, Inc.
英文描述: Digital Audio Conversion System
中文描述: 數(shù)字音頻轉(zhuǎn)換系統(tǒng)
文件頁(yè)數(shù): 7/30頁(yè)
文件大?。?/td> 385K
代理商: CDB4225
SWITCHING CHARACTERISTICS - CONTROL PORT
(T
A
= 25
o
C; VD+, VA+ = 5V
±
10%;Inputs: logic 0 = DGND, logic 1 = VD+, C
L
= 20pF)
Parameter
I
2
C
Mode
(H/S = floating)
Symbol
Min
Max
Units
Note 10
SCL Clock Frequency
fscl
tbuf
thdst
tlow
thigh
tsust
thdd
tsud
tr
tf
tsusp
0
100
kHz
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
ns
μ
s
ns
μ
s
Bus Free Time Between Transmissions
4.7
Start Condition Hold Time (prior to first clock pulse)
4.0
Clock Low Time
4.7
Clock High Time
4.0
Setup Time for Repeated Start Condition
4.7
SDA Hold Time from SCL Falling
SDA Setup Time to SCL Rising
Note 11
0
250
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
1
300
Setup Time for Stop Condition
Notes: 10. Use of the I
2
C
bus interface requires a license from Philips.
I
2
C
is a registered trademark of Philips Semiconductors.
11. Data must be held for sufficient time to bridge the 300ns transition time of SCL.
4.7
t
buf
thdst
t
hdst
t
low
tr
t
f
t
hdd
thigh
t
sud
t
sust
t
susp
Stop
Start
Start
Stop
Repeated
SDA
SCL
CS4225
DS86PP8
7
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