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參數(shù)資料
| 型號： | CDB4223 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 24-Bit 105 dB Audio Codec with Volume Control |
| 中文描述： | 24位105分貝的音量控制音頻編解碼器 |
| 文件頁數(shù)： | 21/32頁 |
| 文件大小： | 778K |
| 代理商： | CDB4223 |
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CS4223 CS4224
DS290PP3
21
SDOUT
8
Serial Data Output (Output) -
Two’s complement MSB-first serial data is output on this pin.
The required relationship between the left/right clock, serial clock and serial data is defined by
the DSP Port Mode (05h) register. The options are detailed in Figures 8 - 11.
SDIN
9
Serial Data Input (Input) -
Two’s complement MSB-first serial data is input on this pin. The
required relationship between the left/right clock, serial clock and serial data is defined by the
DSP Port Mode (05h) register. The options are detailed in Figures 8 - 11.
SCL/CCLK
10
Serial Control Port Clock (Input) -
Clocks the serial control bits into and out of the CS4224.
In I
2
C mode, SCL requires an external pull-up resistor according to the I
2
C specification.
SDA/CDIN
11
Serial Control Port Data (Input/Output)-
SDA is a data I/O line in I
2
C mode and requires an
external pull-up resistor according to the I
2
C specification. CDIN in the input data line for the
serial control port in SPI mode.
AD0/CS
12
Address Bit/Control Chip Select (Input) -
In I
2
C mode, AD0 is a chip address bit. In SPI
mode, CS is used to enable the control port interface on the CS4224. The CS4224 control port
interface is defined by the SPI/I2C pin.
VL
13
Logic Power (Input) -
Positive power supply for the digital interface section. Typically 3.0 to
5.0 VDC.
AINR-, AINR+
16,17
Differential Right Channel Analog Input (Input) -
The full scale analog input level (differen-
tial) is specified in the Analog Characteristics specification table and may be AC coupled or DC
coupled into the device, see Figure 12 for optional line input buffer.
Control Port Format (Input)
- When this pin is high, I
2
C mode is selected, when low, SPI is
selected.
I2C/SPI
18
AINL-, AINL+
19,20
Differential Left Channel Analog Input (Input) -
The full scale analog input level (differential)
is specified in the Analog Characteristics specification table and may be AC coupled or DC
coupled into the device, see Figure 12 for optional line input buffer.
VA
21
Analog Power (Input) -
Positive power supply for the analog section. Typically 5.0 VDC.
AGND
22
Analog Ground (Input) -
Analog ground reference.
AOUTR-,
AOUTR+
23, 24
Differential Right Channel Analog Outputs (Output) -
The full scale analog output level (dif-
ferential) is specified in the Analog Characteristics specification table.
AOUTL-, AOUTL+
25, 26
Differential Left Channel Analog Outputs (Output) -
The full scale analog output level (dif-
ferential) is specified in the Analog Characteristics specification table.
RST
27
Reset (Input)
- When low, the device enters a low power mode and all internal registers are
reset, including the control port. When high, the control port becomes operational and normal
operation will occur.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB4224 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit 105 dB Audio Codec with Volume Control |
| CDB4225 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Digital Audio Conversion System |
| CDB4226 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Surround Sound Codec |
| CDB4227 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Six Channel, 20-Bit Codec |
| CDB4228 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 96 kHz Surround Sound Codec |
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