參數資料
型號: CDB4222
廠商: Cirrus Logic, Inc.
元件分類: Codec
英文描述: 20-Bit Stereo Audio Codec with Volume Control
中文描述: 20帶有音量位立體聲音頻編解碼器控制
文件頁數: 4/26頁
文件大小: 580K
代理商: CDB4222
SWITCHING CHARACTERISTICS
(T
A
= 25
°
C; VA, VD = +5V
±
5%, outputs loaded with 30pF)
Parameter
Symbol
Min
Typ
Max
Units
Audio ADC’s & DAC’s Sample Rate
MCLK Frequency
MCLK Pulse Width High
Fs
4
-
-
-
-
-
-
-
-
50
26
-
-
-
-
-
-
-
-
kHz
MHz
ns
ns
ns
ns
ns
ns
ps RMS
ms
ns
(MCLK = 256, 384, or 512 Fs)
MCLK = 512 Fs
MCLK = 384 Fs
MCLK = 256 Fs
MCLK = 512 Fs
MCLK = 384 Fs
MCLK = 256 Fs
1.024
10
21
31
10
21
31
-
10
-
MCLK Pulse Width Low
MCLK Jitter Tolerance
RST Low Time
SCLK Falling edge to SDOUT output valid (DSCK=0)
500
-
-
(Note 8)
t
dpd
1
(
384
)
Fs
+
20
25
25
25
-
LRCK edge to MSB valid
SDIN Setup Time Before SCLK Rising Edge
SDIN Hold Time After SCLK Rising Edge
SCLK Period
t
lrpd
t
ds
t
dh
t
sckw
-
-
-
1
-
-
-
-
ns
ns
ns
ns
(DSCK=0)
(DSCK=0)
(
128
)
Fs
40
40
20
40
SCLK High Time
SCLK Low Time
SCLK Rising to LRCK Edge
LRCK Edge to SCLK Rising
Notes:
8. After powering up the CS4222, PDN should be held low for 10 ms to allow the power supply
to settle.
t
sckh
t
sckl
t
lrckd
t
lrcks
-
-
-
-
-
-
-
-
ns
ns
ns
ns
(DSCK=0)
(DSCK=0)
sckh
sckl
sckw
t
t
t
MSB
MSB-1
*SCLK shown for DSCK = 0, SCLK inverted for DSCK = 1.
t
dpd
SDOUT
LRCK
SCLK*
SDIN
dh
t
ds
t
lrpd
t
lrcks
t
lrckd
t
Serial Audio Port Data I/O timing
CS4222
4
DS236PP3
相關PDF資料
PDF描述
CDB4224 24-Bit 105 dB Audio Codec with Volume Control
CDB4223 24-Bit 105 dB Audio Codec with Volume Control
CDB4225 Digital Audio Conversion System
CDB4226 Surround Sound Codec
CDB4228A 24-Bit, 96 kHz Surround Sound Codec
相關代理商/技術參數
參數描述
CDB4223 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit 105 dB Audio Codec with Volume Control
CDB4224 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit 105 dB Audio Codec with Volume Control
CDB4225 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Digital Audio Conversion System
CDB4226 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Surround Sound Codec
CDB4227 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Six Channel, 20-Bit Codec